Herron will present Various Ways to Minimize Voiding Under Bottom Terminated Components. This discussion will include the common challenge in SMT of voiding under bottom-terminated packages. Voids in the solder joints can lead to hot spots and component damage. Herron will outline possible ways to combat this challenge, including changes in stencil design, changes in board pad design, or the use of solder preforms. For more information on this workshop, visit www.zestron.com.
Herron has worked with the world renowned Dr. Ning-Cheng Lee in Indium Corporation's research and development laboratory for more than five years. In addition, his work with Indium Corporation’s Dr. Yan Liu focused on developments in solder paste and flux technologies. He has co-authored several research papers on the topic of QFN voiding. Herron has a bachelor’s degree in chemistry from Oklahoma State University, Stillwater, Oklahoma. He earned his Six Sigma Green Belt from the Thayer School of Engineering at Dartmouth College and was certified in IPC-A-600 and IPC-A-610-D.
Indium Corporation is a premier materials manufacturer and supplier to the global electronics, semiconductor, solar, thin-film, and thermal management markets. Products include solders and fluxes; brazes; thermal interface materials; sputtering targets; indium, gallium, germanium, and tin metals and inorganic compounds; and NanoFoil®. Founded in 1934, Indium has global technical support and factories located in China, Singapore, South Korea, the United Kingdom, and the USA.