Papers by Dr. Ronald C. Lasky
Advantages of Bismuth-based Alloys for Low Temperature Pb-free Soldering and Rework
by Brook Sandy , Ed Briggs , Dr. Ronald C. Lasky
The increased function of personal electronic devices, such as mobile phones and personal music devices, has driven the need for smaller and smaller active and passive components. This trend toward miniaturization, occurring at the same time as the conversion to RoHS-compliant lead-free assembly, has been a considerable challenge to the electronics assembly industry. The main reason for this is the higher reflow process temperatures required for Pb-free assembly. These higher temperatures can thermally damage the PCB and the components. In addition, the higher reflow temperatures can negatively affect the solder joint quality, especially when coupled with the smaller paste deposits required for these smaller components. If additional thermal processing is required, the risk increases even more.
bismuth, bismuth based alloys, low temperature soldering, pb-free, delamination, lead-free
[Permanent Link to this Paper ]
Posted on 6 Jun 2011
An Effective Design of Experiment Strategy to Optimize SMT Processes
by Dr. Ronald C. Lasky , Daryl Santos PhD
It is now widely accepted that using designed experiments is the most effective way to optimize surface mount technology (SMT) processes. This situation begs the question “what is an effective strategy in implementing this powerful tool?” This paper will present such a strategy that incorporates Taguchi’s approach for screening, full factorial analysis for optimization and central composite design for precise modeling. We will present these techniques using MINITABTM Release 13 statistical software and printed circuit board industry applications.
pb-free, lead-free, design of experiments, DOE, line optimization, continuous improvement, process modeling, process improvement
[Permanent Link to this Paper ]
Posted on 31 Mar 2010
An Overview of a Successful Pb-Free Implementation
by Timothy Jensen , Dr. Ronald C. Lasky
The clock is ticking, on July 1, 2006 the WEEE Initiative will take effect. Thereafter, all electronic assemblers that sell products in Europe must be ready to convert their assembly processes to
Pb-free . The nearness of this date raises the question of what can be done to get ready. In response to this need, we will review a pioneering effort in establishing a Pb-free process.
pb-free, lead-free, WEEE, RoHS
[Permanent Link to this Paper ]
Posted on 4 Mar 2010
Applications of Solder Fortification™ With Preforms
by Dr. Ronald C. Lasky , Paul Socha , Carol Gowans
Although many have predicted the demise of through-hole components, they
are alive and well with tens of billions assembled each year. In many cases
these components are assembled by wave soldering. However, in many mixed
product technology (i.e. SMT and through-hole on the same board) products,
it makes sense to consider assembling the through-hole components with the
pin-in-paste (PIP) process. PIP has been successfully used for several decades
now; however in many cases it is not possible to print enough solder paste to
obtain an acceptable solder joint. In addition to this “solder starved” condition,
the large quantity of solder paste used to form the though-hole joint results in
excess residual flux. This residual flux can lead to difficulties in in-circuit testing
and potential surface insulation resistance concerns.
In light of the above need, solder preforms have been developed. These slugs of
solder typically come in the same sizes as 0402, 0603, and 0805 passive components.
The solder preforms are placed by the component placement machines
onto the solder deposit. This additional solder assures that an adequate solder
joint is formed with a minimum of solder paste and its residual flux.
Although PIP was an early application of solder preforms, more recently other
“solder starved” applications have emerged such as radio frequency (RF)
shields and connectors. In addition, the use of ultra thin stencils in the assembly
of miniaturized components can result in some other components being solder
starved and, hence are candidates for solder preforms.
This paper will cover the design and assembly techniques for using of solder
preforms in the “solder fortification™” needs described above. Several successful
applications will be presented. In some of these applications, defects were
reduced by 95% after implementing solder preforms.
Apex 2011, solder starvation, flux, PIP, pin-in-paste, through-hole, SMT, solder fortification, solder paste, solder preforms
[Permanent Link to this Paper ]
Posted on 11 Apr 2011
Applications of Solder Preforms to Improve Reliability
by Dr. Ronald C. Lasky , Carol Gowans
As early as the 1990s, people were predicting the end of through-hole components, but they are alive and well with the numbers of dual in-line packages (DIPs) and connectors still measured in the tens of billions per year. Many of these components are assembled by wave soldering; however, in mixed technology (SMT and through-hole on the same board) where the through-hole count is low, it is often advantageous to consider selective soldering or the pin-in-paste process (PIP). PIP is a process in which solder paste is printed over or near the PWB through-holes. The through-hole components are then placed and the solder joint is formed during the reflow process. PIP has the advantage of eliminating the wave soldering process step. In many cases it is difficult to print enough solder paste to make an acceptable through-hole solder joint. Solder preforms were developed to meet this need.
These solder preforms are typically shaped in the form of 0402, 0603, or 0805 passive components. The preforms are placed on the appropriate printed solder paste deposit by a component placement machine. Preforms come in tape & reel packaging.
Today solder preforms are also used in other “solder starved” applications such as radio frequency (RF) shields, connectors, and under QFN thermal pads. In all cases, the extra solder delivered by the preform is vital to the reliability of the assembled product.
In this paper, process, design, and assembly methods for solder fortification using preforms will be discussed. Four successful solder fortification examples will be presented along with the associated defect reductions.
solder preforms, pin-in-paste, solder fortification, solder starvation, mobile phone shields, QFN packages, flux
[Permanent Link to this Paper ]
Posted on 14 Oct 2011
Assembling Today's Miniaturised Electronic Products
by Dr. Ronald C. Lasky
Miniaturised electronics and the advent of
lead-free soldering have added new challenges to the SMT electronic assembly process, most notably in the arenas of stencil printing and reflow. Recent work on improving these assembly processes and advances in solder paste technology can help to minimise these process challenges.
halogen-free, solder paste, solder, solder reliability, flux, pb-free, lead-free
[Permanent Link to this Paper ]
Posted on 15 Mar 2009
Assembly of PWBs in a RoHS and Non-RoHS Compliant World
by Dr. Ronald C. Lasky
The assembly of PWBs for the automotive, medical and aerospace industries creates new
challenges in a mostly RoHS compliant world. Some of the challenges arise because
these industries are partially or fully exempted, for now, from RoHS. The automobile
industry can assemble RoHS 5 (tin-lead solder paste and components with tin-lead
finished leads, the remaining hardware being RoHS compliant) PWBs, whereas the
medical and aerospace industries can assembly fully RoHS exempt electronics. For
facilities that are dedicated to one type of manufacturing, the logistics issues are reduced.
However, with the exponential increase in the use of sub-contract assemblers, some of
these facilities have to assemble the full range of product types: RoHS exempt, RoHS 5,
RoHS 5.5 (RoHS 5 with BGAs that have SAC solder balls) and RoHS 6 (fully compliant
RoHS assembly) under one roof. This situation creates not only assembly technical
challenges, but considerable material handling and logistics issues.
[Permanent Link to this Paper ]
Posted on 4 Mar 2010
Best Practices Reflow Profiling for Lead-Free SMT Assembly (Chinese)
by Ed Briggs , Dr. Ronald C. Lasky
Chinese version of Best Practices Reflow Profiling for
Lead-Free SMT Assembly.
CHINESE LANGUAGE, graping, head-in-pillow, Voids, solder balling, solder beading, tombstoning, reflow profile, solder defects
[Permanent Link to this Paper ]
Posted on 22 Mar 2010
Best Practices Reflow Profiling for Lead-Free SMT Assembly (English)
by Dr. Ronald C. Lasky , Ed Briggs
The combination of higher lead-free process temperatures, smaller print deposits, and temperature restraints on electrical components has created difficult challenges in optimizing the reflow process. Not only are the electronic components and the PWB at risk, but the ability to achieve a robust solder joint becomes difficult, especially if the PCB is thermally massive. In addition, the constant miniaturization of electronic components, hence smaller solder paste deposits, may require the use of smaller particle-sized powders. Both the small solder paste deposits and small particle size result in a large surface area-to-volume ratio that challenges the solder paste's flux to effectively perform its fluxing action. The possible resulting surface oxidation can lead to voiding, graping, head-in-pillow, and other defects. Smaller components are also more susceptible to tombstoning and defects related to solder paste slump.
This paper is a summary of best practices in optimizing the reflow process to meet these challenges of higher reflow temperatures, smaller print deposits, decreased powder particle size, and their affect on the reflow process. It also discusses trouble-shooting of the most common defects in lead-free reflow, such as tombstoning, solder beading/balling, residue discoloration, voiding, graping, and head in pillow.
solder defects, reflow profile, tombstoning, solder beading, solder balling, Voids, head-in-pillow, graping
[Permanent Link to this Paper ]
Posted on 1 Jun 2009
Challenges for Implementing a Halogen-Free Process
by Dr. Ronald C. Lasky , Timothy Jensen
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Challenges for Implementing a Halogen-Free Process
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The drive to produce halogen-free electronics has grown significantly, driven partly by legislation and partly by environmentalist organizations. This paper will discuss the challenges of implementing such a halogen-free assembly process. It will start by briefly discussing the reasons that “halogen-free” is with us. The PCB materials that might contain halogens will then be presented. PWB and component concerns will be briefly reviewed. The bulk of the paper will center on the process development issues in establishing a halogen-free assembly process, including solder paste evaluation and selection, solder fluxes, the SMT stencil printing process, reflow and test. Comparisons between halogen containing and halogen-free solder pastes regarding their process performance and reliability will also be presented. The paper will close with a brief review of techniques to analyze halogen content in materials and some of the pitfalls if inappropriate tests are used.
halogen-free
[Permanent Link to this Paper ]
Posted on 11 May 2009
Challenges of Implementing a Halogen-Free PCB Assembly Process (Chinese)
by Timothy Jensen , Dr. Ronald C. Lasky
Chinese version of Challenges of Implementing a
Halogen-Free PCB Assembly Process.
oxidation barrier, activator, pb-free, reflow, graping, head-in-pillow, halide-free, halogen-free, halogens, CHINESE LANGUAGE
[Permanent Link to this Paper ]
Posted on 22 Mar 2010
Challenges of Implementing a Halogen-Free PCB Assembly Process (English)
by Dr. Ronald C. Lasky , Timothy Jensen
The electronics industry continues to strive to provide more environmentally friendly products. This movement is partly due to legislation from various countries, partly due to public outcry from well publicized 3rd world recycling practices, and partly due to non-government organizations (NGOs) testing and publishing information on electronic devices regarding their content of various toxic materials. One set of materials targeted for reduction and eventual elimination are halogenated compounds. Halogens are found in plastics for cables and housings, board laminate materials, components, and soldering fluxes. Replacing these halogenated compounds can have a dramatic affect on the PCB
assembly process. In this paper those challenges will be discussed as well as techniques and practices that will help ensure high end of line yields and continued reliability.
oxidation barrier, activator, pb-free, reflow, graping, head-in-pillow, halide-free, halogen-free, halogens
[Permanent Link to this Paper ]
Posted on 4 Mar 2010
Challenges of Miniaturization
by Dr. Ronald C. Lasky
It is likely that a modern mobile phone has more computing power than all of the computers that NASA used to send men to the moon in the late 1960s. This idea is especially interesting when one considers that the electronics of that era had almost no integrated circuits (ICs) and that many computer circuits were individual transistors, resistors, and capacitors. Today's PC microprocessors have the equivalent of hundreds of millions of these components, all electrically connected in the IC. Such miniaturization has enabled the electronics revolution.
PCB assembly, electronics assembly, solder joint, solder paste
[Permanent Link to this Paper ]
Posted on 4 Mar 2010
Choosing a Low-Cost Alternative to SAC Alloys for PCB Assembly: Preliminary Work
by Brook Sandy , Dr. Ronald C. Lasky
Developing low-cost alternatives to near-eutectic SAC alloys for Pb-free assembly is crucial to continue producing affordable electronics products. Metals prices have been on the rise, and other factors, such as concerns about “conflict tin,” indicate that this trend could likely continue. Solder alloys with lower silver content have been considered, with trade-offs in performance, but are there alternatives? This paper discusses some new alloy options, comparing performance to current low-cost options, and considers approaches to enhance the performance of low-cost solder alloys.
solder alloy, lead-free, pb-free, SAC
[Permanent Link to this Paper ]
Posted on 14 Oct 2011
Correlation of SIR, Halide/Halogen, and Copper Mirror Tests
by Nicole Palma, Dr. Ronald C. Lasky
With the advent of RoHS and WEEE and the concern of some companies to eliminate halogen-containing compounds from their products, it is vital to have an understanding of halogen compounds and how to detect them. Halogens are a series of nonmetal elements from Group 17 in the periodic table. These elements are fluorine, chlorine, bromine, iodine, and astatine. A halide ion is a halogen atom bearing a negative charge. Halides can be part of the flux activator system that aid in oxide removal in either a solder paste or flux for wave soldering.
Halide content can be determined by qualitative or quantitative tests. The silver chromate method is a quick and inexpensive qualitative test method used to determine halides in a flux. This test is performed by placing the flux on silver chromate test paper. The halides in the flux react with the silver chromate and produce a characteristic color change on the test paper. A quantitative measure of halides is done by ion chromatography. This quantitative test is quite expensive and time consuming.
Test methods have also been developed to determine the activity of the fluxes in solder paste and wave solder. Most commonly used are the copper mirror and SIR (surface insulation resistance) tests. Copper mirror testing determines the activity of the flux by the effect the flux has on bright copper mirror films which have been vacuum deposited on clear glass. Based on J-STD 004B, the flux can be classified based on its activity levels as determined by this test.
SIR is an electrical test that measures a change over time in the electrical current between electrodes on the surface of a PCB. It is performed at high temperature and humidity levels, typically 85°C and 85% RH. Ionic residue, left on the PCB after reflow from flux activators, may cause low (i.e. poor) SIR readings.
This paper will discuss the theories behind these test techniques, their differences, and how the presence of halides in the flux activators will affect the SIR and copper mirror results.
silver chromate, flux, copper mirror, SIR, halides, halogens, ion chromatography
[Permanent Link to this Paper ]
Posted on 14 Oct 2011
Die Attach in Lead Frame Packages: A Tutorial
by Frank Komitsky Jr., Dr. Ronald C. Lasky
Although much of the “buzz” in the industry surrounds the newer “high tech” packages such as ball grid array (BGA), chip scale packages (CSP) and flip chip, the foundation of modern electronics is the lead frame package. The major lead frame packages small outline integrated circuits (SOICs) and plastic quad flat packs make up the bulk of all surface mount integrated circuit packages manufactured in the world. See Figure 1. With 70 billion produced in 2004, they represent about 70% of all surface mount packages. So many are made, that every man, woman and child on earth could be given 11 of these packages each year. Laid end to end, a year’s worth of production of these packages would reach farther than from the earth to the moon and back.
semiconductor packaging, semiconductor assembly, lead frame, die attach
[Permanent Link to this Paper ]
Posted on 19 May 2010
Fine Feature Stencil Printing 0.3MM Pitch Components (Chinese)
by Ed Briggs , Dr. Ronald C. Lasky , Chris Anglin
Chinese version of Fine Feature Stencil Printing 0.3MM Pitch Components
CHINESE LANGUAGE, solder paste, stencil printing, miniaturization
[Permanent Link to this Paper ]
Posted on 13 May 2011
Fine Feature Stencil Printing 0.3MM Pitch Components (English)
by Chris Anglin, Dr. Ronald C. Lasky , Ed Briggs
The explosive growth of personal electronic devices such as mobile phones and personal music devices has driven the need for smaller and smaller passive and active electrical components. Not too long ago, 0401 (40 x 10 mils) passives were seen as the ultimate in miniaturization, but recently 0201 and now 01005 passives have arrived, with rumors of even smaller sizes to come. For active electrical components, the 0.4mm pitch component has become commonplace with 0.3mm already in the works. What effect does this miniaturization have on the stencil printing process? Can it meet the challenge? This paper takes a preliminary look at some of the work that has been performed to evaluate the capability of the stencil printing process to print these fine feature components. Discussed is the stencil printing of the small features and efforts to obtain consistent volume in the printed solder paste deposit.
miniaturization, stencil printing, solder paste
[Permanent Link to this Paper ]
Posted on 4 Mar 2010
Fine Powder Solder Pastes: Stencil Printing and Reflow in Lead-Free Assembly
by Chris Anglin, Dr. Ronald C. Lasky , Ed Briggs , Timothy Jensen
The explosive growth of personal electronic devices, such as mobile phones and personal music devices, have driven the need for smaller and smaller active and passive electrical components. Not too long ago, 0401 (40 x 10 mils) passives were seen as the ultimate in miniaturization, but recently 0201 and now 01005 passives have arrived, with rumors of even smaller sizes to come. For active components, the 30 mil CSP (a chip scale package with the solder balls on 30 mil (0.75mm) centers) has become virtually a requirement for enabling the many features in modern portable electronic devices. The more than 1 billion mobile phones assembled in 2008 will use the lion’s share of the 12 billion or so CSPs concurrently manufactured.
This miniaturization trend occurring at the same time as the conversion to RoHS compliant lead-free assembly has put a considerable strain on the electronic assembly industry. This paper will discuss some of these challenges and the work that has been performed to mitigate them. Among the challenges discussed are stencil printing the small features and obtaining consistent volume in the printed solder paste deposit, minimizing the oxidation of the solder powder in the small deposit during reflow, and assuring a good finished solder joint after the reflow process.
area ratio, Print Study, Fine Powders
[Permanent Link to this Paper ]
Posted on 4 Mar 2010
Flux Chemistry for Pb-Free SMT
by Dr. Ronald C. Lasky , Ed Briggs
In order to meet the European directives, WEEE (Waste Electrical and Electronic Equipment, effective Aug 2005) and RoHS (Restriction of Hazardous Substances, effective July 2006), high tin-containing alloys have entered the market as
lead-free options . For surface mount technology, the more popular of these high tin options are the SAC alloys (Sn/Ag/Cu). Unfortunately, SAC alloys have a higher melting point and exhibit poor wettability compared to Sn/Pb eutectic alloys.
[Permanent Link to this Paper ]
Posted on 4 Mar 2010
High Technology Challenge: Assembling Today's Miniaturized Electronics Products
by Dr. Ronald C. Lasky
If asked what technology product defines today, one might first answer the personal computer (PC). Although, 10 or 15 years ago that might have been the right answer, a little more thought will show that the mobile phone is today's technologically defining product. Sheer numbers tell the story: over 1 billion mobile phones are manufactured each year. Considering that the population of the world is about 6.5 billion souls, 1 billion mobile phones each year is an astounding number. In addition, a mobile phone is likely the most multi-functional personal device in existence. Just think, it can be a phone, camera, personal data assistant, web surfer, email device, text messenger, GPS device, portable music player, portable video player, streaming audio and video player, miniature PC, and probably a few more things. To package and assemble all of this electronic functionality in such a small device is a challenge indeed. This paper will discuss some of the assembly challenges of such miniaturized electronics.
lead-free, graping, stencil printing, solder paste
[Permanent Link to this Paper ]
Posted on 4 Mar 2010
Implementing Pb-Free Assembly at Your Factory
by Timothy Jensen , Dr. Ronald C. Lasky
lead-free, pb-free
[Permanent Link to this Paper ]
Posted on 31 Mar 2010
Leaded and Lead-Free Solder Paste Evaluation Screening Procedure
by Aniket A. Bhave, Daryl Santos PhD, Dr. Ronald C. Lasky
Numerous studies have shown that greater than 60% of end of line defects in SMT assembly can be traced to
solder paste and the printing process. Reflowing adds another 15% or so. In light of this fact, it is surprising that no simplified procedure for solder paste evaluation has been documented. This paper is about such a procedure.
pb-free, lead-free, stencil printing, solder paste, solder paste evaluation
[Permanent Link to this Paper ]
Posted on 31 Mar 2010
Minimizing Voiding in QFN Packages Using Solder Preforms
by Seth Homer , Dr. Ronald C. Lasky
According to Prismark Partners, the use of QFNs is growing faster than any package type except for flip-chip CSPs. Prismark projects that by 2013, 32.6 billion QFNs will be assembled worldwide, which represents 15% of all IC packages.
However, QFNs can be a challenge to assemble, especially when it comes to voiding. In most QFN assembly processes, solder paste is used as a means of attachment. This approach can be problematic, as excessive voiding often occurs due to the lack of standoff on the component and the high flux content of the paste. The addition of a solder preform can reduce such voiding by increasing the solder volume of the joint without adding flux volume.
Adding preforms to an assembly process is very easy. Preforms are packaged in tape & reel for easy placement by standard pick and place machines, right next to your components. The focus of this paper will quantify the preform requirements and process adjustments needed to use preforms in a standard SMT process. In addition, experimental data showing void reduction using preforms will also be presented.
solder preforms, flux, QFN packages
[Permanent Link to this Paper ]
Posted on 14 Oct 2011
Process Optimization to Prevent the Graping Effect
by Dr. Ronald C. Lasky , Ed Briggs
The explosive growth of personal electronic devices, such as mobile phones and personal music devices, has driven the need for smaller and smaller active and passive electrical components. Not too long ago, 0401 (40 x 10 mils) passives were seen as the ultimate in miniaturization, yet the introduction of 0201’s and most recently 01005 passives has occurred. For active components, area array packages with 0.4mm lead spacing have become virtually a requirement for enabling the many features in modern portable electronic devices, with 0.3mm packages already on the way.
This miniaturization trend, occurring at the same time as the conversion to RoHS compliant lead-free assembly, has put a considerable strain on the electronic assembly industry. This paper will discuss the specific challenge of the Graping Effect and the work that has been performed to mitigate this phenomenon. Discussed are the effects of the solder paste material attributes, consistent stencil printing of the small solder paste deposits required, and minimizing oxidation of the small solder paste deposit during reflow. All of these steps are necessary to assure a good finished solder joint.
solder paste, graping, oxidation, stencil printing
[Permanent Link to this Paper ]
Posted on 21 Jan 2011
RoHS Recast
by Dr. Ronald C. Lasky , Krista Botsford
Even today, its is not widely understood that the fundamental reason that the European Union's Restriction of Hazardous Substances (RoHS) law was put into effect was to support its sister recycling Waste of Electronic and Electrical Equipment (WEEE) law. It is simply much safer, easier and cheaper to recycle electronics equipment that contains little toxic materials. The bill for the industry to convert to RoHS compliant assembly has been estimated at over USD $40 billion, a figure we think is low. RoHS has had the unintended benefit of making uncontrolled recycling of electronic waste in third world countries much safer for workers and environment. National Geographic published an excellent article on this need.
RoHS, electronic
[Permanent Link to this Paper ]
Posted on 9 Mar 2010
RoHS: Five Years Later
by Dr. Ronald C. Lasky
Are electronics any “greener” than before RoHS? It is a fair question to ask. With the advent of RoHS on July 1, 2006, and more recently REACH, one might be inclined to answer that it is greener than it was. We will take a look at this question in several different ways, to discover the actual positive and negative effects of RoHS in both first world and developing countries.
RoHS, lead-free, pb-free, electronics recycling
[Permanent Link to this Paper ]
Posted on 14 Nov 2011
Six Sigma® Techniques for Solder Paste Selection
by Wang Ming, Aniket A. Bhave, Dr. Daryl Santos, Dr. Ronald C. Lasky , Sniket A. Bhave
Numerous studies have shown that greater than 60% of end of line defects in SMT assembly can be traced to
solder paste and the printing process. Reflowing adds another 15% or so. In light of this fact, it is surprising that no simplified procedure for solder paste evaluation has been documented. This paper is about such a procedure.
By using designed experiments and the measurement of critical solder paste related process metrics, we were able to develop a solder paste evaluation procedure that maximizes information about the solder paste and its processability while minimizing experimentation. While using only 12 stencil printed PWBs, we were able to generate statistically significant results that enabled us to rank solder pastes according to their performance. Response metrics that were investigated were print volume and definition before and after pause, squeegee hang up, slump, tack, release from aperture, and solder joint quality.
In addition, we found such variation in solder paste volume repeatability that this criterion alone can be used as a screening procedure.
lead-free, pb-free, solder paste evaluation, solder paste, stencil printing
[Permanent Link to this Paper ]
Posted on 9 Mar 2010
Soldering Challenges in a Halogen-Free PCB Assembly Process (Chinese)
by Amanda Hartnett , Dr. Ronald C. Lasky , Timothy Jensen
Chinese version of Soldering Challenges in a Halogen-Free PCB Assembly Process
halogen-free, halide-free, solder, soldering, graping, flux, head-in-pillow, hole-fill, CHINESE LANGUAGE
[Permanent Link to this Paper ]
Posted on 13 May 2011
Soldering Challenges in a Halogen-Free PCB Assembly Process (English)
by Timothy Jensen , Dr. Ronald C. Lasky , Amanda Hartnett
Flame retardants have played an important role in the safety of many products. It is safe to say that thousands of lives have been saved by flame retardants. Flame retardants are used in products as varied as children's pajamas to electronics assemblies. Some of the more successful flame retardants are halogenated compounds. Halogenated materials are found in polyvinyl chloride (PVC), brominated flame retardants (BFRs), chlorinated flame retardants (CFRs), as well as in fluxes used in the electronics assembly industry. Product does not contain any halogenated compounds. However, that is not exactly how the term is used for soldering fluxes. A flux that is classified as
halide-free by the IPC/J-STD-004 is actually only free of ionic halides.
hole-fill, head-in-pillow, flux, graping, soldering, solder, halide-free, halogen-free
[Permanent Link to this Paper ]
Posted on 10 Mar 2010
The Profit Sleuth
by Dr. Ronald C. Lasky
"The Professor", as he is affectionately called by his students and colleagues, is, among other things, a profit sleuth. Using ProfitPro3™ software he has been able to help electronics assembly professionals recover lost profit. Let's go with him to his latest case.
solder paste
[Permanent Link to this Paper ]
Posted on 10 Mar 2010
The Road Ahead for Mobile Phone Manufacturing
by Dr. Ronald C. Lasky
Mobile phones are rapidly becoming the electronic device that defines Generation Y. Witness the comical antics in “Zits” where the teenage son, Jeremy, and his friends often show amazement at how “clueless” their parents are about what a mobile phone can do. One episode that sticks in my mind is a time when Jeremy and his friends were discussing the “old days” with his parents. Jeremy’s father pointed out that when he was a teen there was only one phone in the house. Jeremy’s girl friend then enquired, “How did you keep everyone’s ring tones straight?”
One thing is for sure; the mobile phone is here to stay and competes only with the personal computer as the defining electronic device of the age. Perhaps, in some respects, they don’t compete, as some of today’s mobile phones are really mini PCs.
[Permanent Link to this Paper ]
Posted on 10 Mar 2010
Through-Hole Assembly Options for Mixed Technology Boards
by Karl Pfluke , Dr. Ronald C. Lasky , Ross B. Berntson
Surface mount assembly has dominated its through-hole predecessor since the early 1990s. The higher density and lower ultimate cost of SMT makes it a preferred assembly technology. However, the mechanical strength of through-hole connections continues to make through-hole the technology of choice in assembling connectors. This presentation will describe the primary methods currently used for through-hole connector assembly: 1) selective wave solder, 2) pin-in-paste (PIP)i reflow, 3) hand soldering and 4) solder preforms. We will show how solder preforms are an excellent alternative when PIP provides insufficient solder.
The wave solder method requires specialized equipment and processes to solder connectors. Pin-in- paste reflow evolved as a way to accomplish through-hole assembly without additional equipment or process steps. In the PIP method, the additional solder required to fill the though-hole barrel is deposited by overprinting the pad in the area of each connector pin, using standard SMT equipment. During reflow, the solder wicks to each pin forming the solder fillet.
This paper explains why pin-through-paste reflow methods based on overprinting solder paste have become more challenging due to an increasing use of Organic Solderability Preservative (OSP), fine- feature devices (e.g. fine pitch connectors) and densely populated PCB layout designs that conflict with requirements for successful use of step-stencils. This paper also shows an example where solder preforms were used to provide extra solder volume for each pin. This work demonstrates how solder preforms provide a viable manufacturing solution to ensure complete through-hole solder joints.
lead-free, pb-free, through-hole connectors, selective wave soldering, mixed technology, intrusive reflow, pin-in-paste, solder preforms
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
Virtues of Indium as a Thermal Interface Material
by Amanda Hartnett , Dr. Ronald C. Lasky
The element indium is an ideal thermal interface material (TIM) for heat dissipation in many of today’s very fast, very hot integrated circuits. Its key advantage is its high bulk thermal conductivity, but other attributes include a low tensile strength and indium’s ability to lower melting temperatures when alloyed with other elements.
TIM, indium
[Permanent Link to this Paper ]
Posted on 10 Mar 2010