Papers by Dr. Yan Liu
A Model Study of Profiling for Voiding Control at Lead-free Reflow Soldering
by Dr. Ning-Cheng Lee , Dr. Benlih Huang, William Manning, Dr. Yan Liu
Voiding is attributed to the flux outgassing within the solder joints when the solder is at molten state. The effect of reflow profile on voiding at microvia for lead-free soldering is strongly dependent on the flux chemistry. In general, wetting is more important than
melting outgasing behavior, and can be enhanced by employing a higher melting energy, including both higher peak temperature and longer dwell time. Use of a high soaking energy can help drying out volatiles hence reduce the melting outgasing and result in low
voiding, but may also increase oxidation for pastes with poor oxidation resistance and cause a high voiding. Testing oxidation resistance of solder paste beforehand will promise a more accurate selection of soaking energy.
pb-free, soldering, BGA, CSP, void, voiding, SMT, solder, lead-free, microvia, profile, reflow
[Permanent Link to this Paper ]
Posted on 2 Mar 2010
Sealing the Gap of Solder Paste Technology in Lead-Free Halogen-Free Era
by Dr. Ning-Cheng Lee , Dr. Arnab Dasgupta, Dr. Runsheng Mao, Dr. Yan Liu
Electronic industry has been driven toward lead-free by RoHS (Restriction of Hazardous Substances Directive) which is in force since 2006. Recently REACH (Registration, Evaluation and Authorization of Chemicals) further drives the industry toward halogen-free. As a result, solder pastes for PCB assembly are required or desired to be both lead-free and halogen-free. Lead-free solder alloys in general wet poorer than tin-lead due to the higher surface tension of the former alloys. In the mean time, halogen-free fluxes typically also wet poorer than the more powerful halogen-containing fluxes. Consequently, the lead-free and halogen-free solder paste products that emerged inevitably suffer from a considerably inferior soldering performance than that of conventional halogen-containing tin-lead solder pastes. The deficiencies include poor wetting, solder balling, voiding, graping, head-in-pillow, etc. This gap is particularly significant for fine-pitch applications where the impact of oxidation is more profound. Furthermore, the higher soldering temperature of the higher melting lead-free alloys also aggravates the challenge of in-circuit test for no- clean processes, mainly due to the difficulty for probe to penetrate through the toughened flux residue. Although use of inert reflow atmosphere may alleviate some of the problems, the higher cost of it is prohibitive for most of the manufacturing firms. In this work, a halogen-free lead-free no-clean solder paste system, Indium8.9HF series, has been developed. It exhibits superior oxidation tolerance, thus assures superior resistance against graping, head-in-pillow, solder balling, voiding, and poor wetting for miniaturized electronic applications. In spite of the immense challenge in material science, this system also shows outstanding probe testability, in addition to its very good printability, non- slump, SIR, and ECM performance. The superior performance of this Indium8.9HF system effectively sealed the gap caused by lead-free and halogen-free requirements.
lead-free, halogen-free, no-clean, solder, solder paste, miniaturization, graping, head-in-pillow, voiding, solder balling, probe testability, ICT, oxidation
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
Selection of Dip Transfer Fluxes and Solder Pastes for PoP Assembly
by Dr. Yan Liu, Pamela Fiacco, Derrick Herron, Dr. Ning-Cheng Lee
Consideration and selection of dip transfer fluxes and solder pastes for PoP assembly are described, based on process considerations. The crucial properties vital for successful dip transfer include homogeneity, open time on the flux/paste bed, volume and consistency of the dip transferred material, open time after the dip transfer before reflow, and solder joint formation. For each property, one or more practical, recommended test methods are described. Overall, this work should provide the assembly house with an easy way to select a flux or solder paste adequate for dip transfer of PoP assembly applications.
PoP, package-on-package, flux, solder paste, dip transfer, soldering, SMT
[Permanent Link to this Paper ]
Posted on 24 Jan 2011
Testing and Prevention of Head-In-Pillow
by Dr. Ning-Cheng Lee , Dr. Yan Liu, Pamela Fiacco
Head-in-pillow (HIP) is ailing the electronic industry when assembling BGAs or CSPs onto PCBs. It is caused by warpage of components or boards at reflow process, and is aggravated by oxidation. Methods for assessing the potential for occurrence of HIP are highly desired by the industry. Besides using BGA rework station followed by tedious dye and pry treatment, two other simpler methods are introduced in this work, Tiny Dot Paste method and Ball Onto Paste method. The Tiny Dot Paste method is stressed on the assessment of oxidation barrier capability of solder paste, while Ball Onto Paste method assesses combined capability of oxidation resistance and excessive fluxing capacity. Both methods are quick, easy, and close simulation, with the latter being better in real process simulation. Prevention of HIP can be accomplished by (1) designing packages without warpage, (2) printing more paste, (3) dipping solder paste or flux, (4) using inert reflow atmosphere, (5) reducing reflow temperature, (6) placing heat shield on BGA or CSP, (7) avoiding using water soluble solder paste for BGA bumped with no-clean process, (8) using solder bumps or solder powder with oxidation resistant alloy, (9) using fluxes with high oxidation barrier capability and high fluxing capacity. Among all options listed above, using solder paste with high oxidation barrier capability and high fluxing capacity is considered the most easily implemented approaches.
head-in-pillow, solder, soldering, reflow, SMT, solder paste, BGA, CSP
[Permanent Link to this Paper ]
Posted on 24 Jan 2011
Thermal Pad Design and Process for Voiding Control at QFN Assembly
by Derrick Herron, Dr. Yan Liu, Dr. Ning-Cheng Lee
Quad Flat No Leads (QFN) package designs receive more and more attention in electronic industry recently. This package offers a number of benefits including (1) small size, such as a near die size footprint, thin profile, and light weight; (2) easy PCB trace routing due to the use of perimeter I/O pads; (3) reduced lead inductance; and (4) good thermal and electrical performance due to the adoption of exposed copper die-pad technology. These features make the QFN an ideal choice for many new applications where size, weight, electrical, and thermal properties are important. However, adoption of QFN often runs into voiding issue at SMT assembly. Upon reflow, outgassing of solder paste flux at the large thermal pad has difficulty escaping and inevitably results in voiding. It is well known that the presence of voids will affect the mechanical properties of joints and deteriorate the strength, ductility, creep, and fatigue life. In addition, voids could also produce spot overheating, lessening the reliability of the joints. This is particularly a concern for QFN where the primary function of thermal pads is for heat dissipation. Thermal pad voiding control at QFN assembly is a major challenge due to the large coverage area, large number of thermal via, and low standoff. Both design and process were studied for minimizing and controlling the voiding. Eliminating the thermal via by plugging is most effective in reducing the voiding. For unplugged via situations, a full thermal pad is desired for a low number of via. For a large number of via, a divided thermal pad is preferred due to better venting capability. Placement of a thermal via at the perimeter prevents voiding caused by the via. A wider venting channel has a negligible effect on voiding and reduces joint continuity. For a divided thermal pad, the SMD system is more favorable than the NSMD system, with the latter suffering more voiding due to a thinner solder joint and possibly board outgassing. Performance of a divided thermal pad is dictated by venting accessibility, not by the shape. Voiding reduction increases with increasing venting accessibility, although the introduction of a channel area compromises the continuity of the solder joint. Reduced solder paste volume causes more voiding. Short profiles and long hot profiles are most promising in reducing the voiding. Voiding behavior of a QFN is similar to typical SMT voiding and increases with pad oxidation and further reflow.
QFN assembly, voiding, thermal pad, solder, solder paste, SMT, flux, Apex 2011
[Permanent Link to this Paper ]
Posted on 11 Apr 2011
Voiding Control for QFN Assembly
by Dr. Ning-Cheng Lee , Dr. Yan Liu, Derrick Herron
Quad Flat No Leads (QFN) package designs receive more and more attention in electronic industry nowadays. This package offers a number of benefits including (1) small size, such as a near die-sized footprint, thin profile, and light weight; (2) easy PCB trace routing due to the use of perimeter I/O pads; (3) reduced lead inductance; (4) easy PCB trace routing; and (5) good thermal and electrical performance due to the adoption of exposed copper die-pad technology. These features make the QFN an ideal choice for many new applications where size, weight, electrical, and thermal properties are important. However, adoption of QFN often runs into voiding issues at SMT assembly. Upon reflow, outgassing of solder paste flux at the large thermal pad has difficulty escaping and inevitably results in voiding. It is well known that the presence of voids will affect the mechanical properties of joints and deteriorate the strength, ductility, creep, and fatigue life. In addition, voids could also produce spot overheating, lessening the reliability of the joints. This is particularly a concern for QFN where the primary function of thermal pads is for heat dissipation. Thermal pad voiding control at QFN assembly is a major challenge due to the large coverage area, large number of via, and low standoff. Both design and process were studied for minimizing and controlling the voiding. Eliminating the via by plugging is most effective in reducing the voiding. For an open via situation, a full thermal pad is desired for a low number of via. For a large number of via, a divided thermal pad is preferred due to better venting capability. Placement of a via at the perimeter prevents voiding caused by via. A wider venting channel has a negligible effect on voiding and reduces joint continuity. For divided thermal pada, the SMD system is more favorable than the NSMD system, with the latter suffering more voiding due to a thinner solder joint and possibly board outgassing. Performance of a divided thermal pad is dictated by venting accessibility, not by the shape. Voiding reduction increases with increasing venting accessibility, although introduction of a channel area compromises the continuity of solder joint. Reduced solder paste volume causes more voiding. Short profiles and long hot profiles are most promising in reducing the voiding. Voiding behavior of a QFN is similar to typical SMT voiding and increases with pad oxidation and further reflow.
solder paste, reflow, SMT, solder, void
[Permanent Link to this Paper ]
Posted on 21 Feb 2011