Papers by Mario Scalzo
by Mario Scalzo
Chinese version of Addressing the Challenge of Head-in-Pillow Defects in Electronics Assembly.
CHINESE LANGUAGE, halogen-free, head-in-pillow, pb-free, solder defects, solder paste, solder reliability, lead-free
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Posted on 11 Mar 2010
by Mario Scalzo
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Addressing the Challenge of Head-in-Pillow Defects in Electronics Assembly
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The head-in-pillow defect has become a relatively common failure mode in the industry since the implementation of
Pb-free technologies , generating much concern. A head-in-pillow defect is the incomplete wetting of the entire solder joint of a Ball-Grid Array (BGA), Chip-Scale Package (CSP), or even a Package-On-Package (PoP) and is characterized as a process anomaly, where the solder paste and BGA ball both reflow but do not coalesce. When looking at a cross-section, it actually looks like a head has pressed into a soft pillow. There are two main sources of head-in-pillow defects: poor wetting and PWB or package warpage. Poor wetting can result from a variety of sources, such as solder ball oxidation, an inappropriate thermal reflow profile or poor fluxing action. This paper addresses the three sources or contributing issues (supply, process & material) of the head-in-pillow defects. It will thoroughly review these three issues and how they relate to result in head-in-pillow defects. In addition, a head-in-pillow elimination plan will be presented with real life examples will be to illustrate these head-in-pillow solutions.
lead-free, solder reliability, solder paste, solder defects, pb-free, head-in-pillow, halogen-free
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Posted on 11 May 2009
by Mario Scalzo
While the electronics manufacturing industry has been occupied with the challenge of RoHS compliance and with it,
Pb-free soldering , established trends of increasing functionality and miniaturization have continued. The increasing use of ultra-fine pitch and area-array devices presents challenges in both printing and flux technology. With the decrease in both the size and the pitch of said components, new problems may arise, such as head-in-pillow and graping defects. Print transfer efficiency of the solder paste must be maximized to maintain consistent solder volumes and acceptable solder joints; process optimization may also be a factor. Flux activators have to be redesigned to allow for the less-than-ideal soldering performance of high-tin alloys. These challenges have been met by a statistical approach to formulating solder paste rheology and flux chemistry resulting in high print efficiencies and appropriate activity release to produce high first-pass yields.
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Posted on 3 Mar 2010
by Mario Scalzo
While Global electronics manufacturers have been engaged with meeting the challenges of the European Union's Restrictions on Hazardous Substances, and with it soldering, continued Research & Development have pushed the limits of
solder paste with increased board functionality and miniaturization have continued. This miniaturization increases the use of ultra-fine pitch components and chip-scale packages (CSP's), presenting hard to overcome hurdles in both solder paste flux and process technology. New problems have arisen, such as head-in-pillow and graping defects. Solder paste print transfer efficiency must be maximized to maintain consistent solder volumes and acceptable solder joints, and process optimization must be scrutinized to maintain high first-pass yields. Flux activators have to be redesigned to allow for the less-than-ideal soldering performance of high-tin alloys. These challenges have been met by a statistical approach to optimizing printing, as well as solder paste rheology and flux chemistry resulting in high print efficiencies and appropriate activity release to produce an efficient process.
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Posted on 4 Mar 2010
by Mario Scalzo , Todd O'Neil
Although many predicted the demise of through-hole components, they are alive and well with tens of billions used each year. In mixed SMT/through-hole PCBs, through-hole components, and especially connectors, are often used for their mechanical robustness. A typical example would be a USB connector in a laptop PC. Typically an SMT connection just doesn't have the mechanical robustness needed to support multiple connector plug-in and removals. However, performing a full wave soldering process to assemble a few through-hole components on a mostly SMT PCB doesn't usually make economic sense and may damage the PCB. In such situations, the best option is often to assemble the through-hole components and connectors with a selective soldering process.
This paper touches on identifying favorable flux properties, down-selecting low solids fluxes for lead-free selective wave soldering, the selective soldering process itself, and testing criteria. Topics reviewed will be the flux selection, optimizing the selective soldering process by varying the flux concentration, pre-heat parameters, soldering temperatures, and dwell time. The paper will finish with a summary of the work and a systematic process to select a flux and optimize the selective soldering process for high yields and quality.
flux, pb-free, lead-free, selective soldering, SMT, through-hole, PCB assembly, Apex 2011
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Posted on 11 Apr 2011
by Mario Scalzo , Thomas Acchione
Engineers working with LED and D-pak type component-attach are looking for improved assembly materials and process enhancements to increase throughput, reduce cost, and improve product efficiency and reliability. Many of these packages are susceptible to higher voiding on the ground plate-attach during reflow. A room temperature process would lower voiding, reduce the failure rate, and increase the lifetime of the component.
Technology developments have proven that it is possible to use a localized heat source to bond components at room temperature. This paper discusses the bonding of LED and D-pak components at room temperature. It also talks about the quality and long term reliability of the components. The presentation will demonstrate the component bonding process both manually and through the use of automation, and show attendees how to verify the performance of the components post bonding.
NanoFoil, NanoBond, LED, CTE mismatch, room temperature bonding
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Posted on 24 Jan 2011
