by Amanda Hartnett , Jacques Matteau , Ronnie Spraker, Omar Knio
As semiconductor processing has moved to 300mm wafers, the size of
deposition targets, including tungsten, tantalum, and molybdenum has grown,
and process complexity has increased as well. This added size and complexity
contributes to the stress on a target assembly during the physical vapor deposition
(PVD) process, and the target assembly’s ability to withstand this stress has
a large effect on the resulting deposition rates, yields, and film properties.
One of the major sources of stress is the coefficient of thermal expansion
(CTE) mismatch between metal targets in semiconductor processes, such as
tungsten (CTE of 4.5*10-6/°C), tantalum (6.5*10-6/°C), and molybdenum
(5.1*10-6/°C) compared with their backing plates, which are typically made
of aluminum (23*10-6/°C), brass (21.2*10-6/°C), or copper-chrome (17.6*10-
6/°C). Standard soldering and solid state joining processes have difficulty
controlling stress produced by the CTE-mismatch. We will demonstrate how the
NanoBond® process can be used to control stresses during the bonding and
deposition processes. Modeling will be conducted to compare standard bonding
processes to the NanoBond process, accounting for CTE mismatches.
SVC Tech Con 2011, NanoFoil, NanoBond, sputtering target, CTE mismatch
[Permanent Link to this Paper ]
Posted on 19 Apr 2011
