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5 Solder Families and How They Work
by Eric Bastow
Low melting-temperature alloys are vital to successful electronics assembly.
Solder is a critical material that physically holds electronic assemblies together while allowing the various components to expand and contract, to dissipate heat, and to transmit electrical signals. Without solder, it would be impossible to produce the countless electronic devices that define the 21st century.
Solder is available in numerous shapes and alloys. Each has its particular properties, providing a solder for nearly every application. Many times, solder is an afterthought in the design and engineering process. However, by considering the soldering step early in the design process, problems can be minimized. In fact, with the proper information, the characteristics of a solder can be part of an optimal design.
solder
[Permanent Link to this Paper]
Posted on 1 Dec 2005
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A Compliant and Creep Resistant SAC-Al(Ni) Alloy
by Dr. Ning-Cheng Lee, Dr. Hong-Sik Hwang, Dr. Benlih Huang
Addition of Al into SAC alloys reduces the number of hard Ag3Sn and Cu6Sn5 IMC particles, and forms larger, softer non-stoichiometric AlAg and AlCu particles. This results in a significant reduction in yield strength, and also causes some moderate increase in creep rate. For high Ag SAC alloys, adding Al 0.1-0.6% to SAC alloys is most effective in softening, and brings the yield strength down to the level of SAC105 and SAC1505, while the creep rate is still maintained at SAC305 level. Addition of Ni results in formation of large (Ni,Cu)3Sn4 IMC particles and loss of Cu6Sn5 particles. This also causes softening of SAC alloys, although to a less extent than that of Al addition. Addition of Al also drives the microstructure to shift from near-ternary SnAgCu eutectic toward combination of eutectic SnAg and eutectic SnCu. Addition of Ni drives shifting toward eutectic SnAg. For SAC+Al+Ni alloys, the pasty range and liquidus temperature are about 4°C less than that of SAC105 or SAC1505 if the addition quantity is less than about 0.6%. Addition of Al and Ni also results in a slight decrease in modulus and elongation at break, although the tensile strength is not affected.
Ni, Al, creep resistant, compliant, soften, SAC, lead-free, solder
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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A Drop-In Lead-Free Solder Replacement
by Dr. Ning-Cheng Lee, Iris Artaki, James Slattery, John R. Sovinsky, Paul T. Vianco
Environmental and toxicity concerns related to the use of lead have initiated the search for acceptable, alternate joining materials for electronics assembly. This paper describes a novel
lead-free solder designed as a "drop in" replacement for common tin/lead eutectic solder. The physical and mechanical properties of this solder are discussed in detail with comparison to tin/lead eutectic solder. The performance of this solder when used for electronics assembly is discussed and compared to other common solders. Fatigue testing results are reported for thermal cycling electronics assemblies soldered with this lead-free composition. The paper concludes with a discussion on indium metal availability, supply and price.
pb-free, surface mount, SMT, solder paste, reflow, electronic, lead-free, soldering, solder
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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A Model Study of Low Residue No-Clean Solder Paste
by Paul A. Jaeger, Dr. Ning-Cheng Lee
As one of the major approaches to address the CFC issue, no-clean solder paste has received rapidly increasing attention. Although currently the industry seems to accept full residue paste as a temporary solution, the low residue no-clean paste technology using inert or reactive atmosphere advances immensely to meet the challenge. Presently consensus has not been established yet regarding how low a residue level could be achieved and how inert the atmospheres needs to be. In this study, a semi-empirical model is proposed to predict the soldering performance of low residue solder pastes under various levels of inert reflow atmosphere. The model predicts that the soldering performance would improve rapidly then gradually level off with decreasing oxygen content. The soldering performance vs oxygen content curves are superimposable, with the lower residue one leveling off at lower oxygen level. In general, the experimental data match this model fairly well. However, the data also indicate that, although inert atmosphere improves soldering performance, the optimum condition for bond strength performance seems to demand the presence of some oxygen. This unexpected behavior suggests that a very tight low oxygen level control may not be required. The mechanism responsible for this phenomenon can be attributed to oxidation-induced resin crosslinking. This slows down the flux drying rate as well as hinders the permeation of oxygen through the flux layer.
lead-free, pb-free, nitrogen, flux, reflow, soldering, low-residue, no-clean, solder paste, solder
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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A Model Study of Profiling for Voiding Control at Lead-free Reflow Soldering
by Dr. Ning-Cheng Lee, Dr. Benlih Huang, William Manning, Dr. Yan Liu
Voiding is attributed to the flux outgassing within the solder joints when the solder is at molten state. The effect of reflow profile on voiding at microvia for lead-free soldering is strongly dependent on the flux chemistry. In general, wetting is more important than
melting outgasing behavior, and can be enhanced by employing a higher melting energy, including both higher peak temperature and longer dwell time. Use of a high soaking energy can help drying out volatiles hence reduce the melting outgasing and result in low
voiding, but may also increase oxidation for pastes with poor oxidation resistance and cause a high voiding. Testing oxidation resistance of solder paste beforehand will promise a more accurate selection of soaking energy.
pb-free, soldering, BGA, CSP, void, voiding, SMT, solder, lead-free, microvia, profile, reflow
[Permanent Link to this Paper]
Posted on 2 Mar 2010
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A Novel Flexible Silver Paste Enables Thin Film Photovoltaic Flex Solar Cells
by Dr. Ning-Cheng Lee, James Slattery, Lee Kresge, Dr. Hong-Sik Hwang
A flexible high performance Ag metallization paste LTTF-6363 has been developed for thin film photovoltaic flex
solar cells. The binder of the paste is soft epoxy-based resin system. Compared with a thermoplastic paste system, LTTF-6363 exhibits superior adhesion and is flexible. These features enable the deployment of flex solar panels where tolerance against rolling or bending is critical. LTTF-6363 also displays excellent print characteristics and non-slump performance. This is extremely important for maximizing the effective open areas on solar cells. LTTF-6363 exhibits very good
solderability, thus allows easy soldering connection with other electronic devices.
Thin Film, volume resistivity, contact resistance, solar cell, photovoltaic, metallization paste, flex
[Permanent Link to this Paper]
Posted on 2 Mar 2010
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A Quick Guide to Solder Preforms
by Paul Socha, James Slattery
Solder preforms are manufactured shapes of solder or braze metal designed to fit a specific joint configuration. Preforms contain precise and predetermined quantities of an alloy or a pure metal. They have been used in a variety of applications, such as hybrid and discrete component assembly and surface mount technology. Used in place of traditional solder forms such as wire and ingot, preforms offer advantages for different applications, including versatility enhanced production economies and flexibility.
preforms, solder
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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A Review of Test Methods and Classifications for Halogen-Free Soldering Materials
by Gordon Clark, Renee Michalkiewicz, Timothy Jensen, Brian Toleno, Jasbir Bath
Over the last few years, there has been an increase in the evaluation and use of halogen-free soldering materials. In addition, there has been increased scrutiny into the level of halogens and refinement of the definition and testing of halogen-free soldering materials. The challenge has been that there has been no common standard across the industry in terms of halogen-free definitions and the corresponding test methods to determine these. This has created confusion in the industry as to what end users want and what soldering materials suppliers can actually provide. This paper will review the status of both halogen-free and halide-free in terms of definitions, test methods and the limitations and accuracy of test methods used to determine if a soldering material is halogen/halide-free or not. For halogen-free and halide-free definitions, the paper will review the different industry standards which are currently available and those being drafted, and it will discuss any similarities and differences. It will also cover the origins of some of the definitions mentioned in the standards. The paper will include a review of the accuracy and limitations of several test methods and preparation techniques for halogen and halide determination.
Apex 2011, soldering materials, halides, halogen-free
[Permanent Link to this Paper]
Posted on 11 Apr 2011
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A Room Temperature, Low-Stress Bonding Process to Reduce the Impact of Use Stress on a Sputtering Target Assembly
by Amanda Hartnett, Jacques Matteau, Ronnie Spraker, Omar Knio
As semiconductor processing has moved to 300mm wafers, the size of
deposition targets, including tungsten, tantalum, and molybdenum has grown,
and process complexity has increased as well. This added size and complexity
contributes to the stress on a target assembly during the physical vapor deposition
(PVD) process, and the target assembly’s ability to withstand this stress has
a large effect on the resulting deposition rates, yields, and film properties.
One of the major sources of stress is the coefficient of thermal expansion
(CTE) mismatch between metal targets in semiconductor processes, such as
tungsten (CTE of 4.5*10-6/°C), tantalum (6.5*10-6/°C), and molybdenum
(5.1*10-6/°C) compared with their backing plates, which are typically made
of aluminum (23*10-6/°C), brass (21.2*10-6/°C), or copper-chrome (17.6*10-
6/°C). Standard soldering and solid state joining processes have difficulty
controlling stress produced by the CTE-mismatch. We will demonstrate how the
NanoBond® process can be used to control stresses during the bonding and
deposition processes. Modeling will be conducted to compare standard bonding
processes to the NanoBond process, accounting for CTE mismatches.
SVC Tech Con 2011, NanoFoil, NanoBond, sputtering target, CTE mismatch
[Permanent Link to this Paper]
Posted on 19 Apr 2011
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Achieving High Reliability Low Cost Lead-Free SAC Solder Joints Via MN or CE Doping (Chinese)
by Jeffrey Chan, Scott Chen, Dr. Min Ding, Adriana Porras, Austin Huang, Anthony Gallagher, Dr. Weiping Liu, Dr. Ning-Cheng Lee
Chinese version of Achieving High Reliability Low Cost Lead-Free SAC Solder Joints Via MN or CE Doping.
CHINESE LANGUAGE, lead-free, Reliability, thermal cycling
[Permanent Link to this Paper]
Posted on 6 May 2011
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Achieving High Reliability Low Cost Lead-Free SAC Solder Joints Via MN or CE Doping (English)
by Dr. Weiping Liu, Dr. Ning-Cheng Lee, Adriana Porras, Dr. Min Ding, Anthony Gallagher, Austin Huang, Scott Chen, Jeffrey Chan
In this study, the reliabilities of low Ag SAC alloys doped with Mn or Ce (SACM or SACC) were evaluated under JEDEC drop, dynamic bending, thermal cycling, and cyclic bending test conditions against eutectic SnPb, SAC105, and SAC305 alloys. The Mn or Ce doped low cost SAC105 alloys achieved a higher drop test and dynamic bending test reliability than SAC105 and SAC305, and exceeded SnPb for some test conditions. More significantly, being a slightly doped SAC105, both SACM and SACC matched SAC305 in thermal cycling performance. In other words, the low cost SACM and SACC achieved a better drop test performance than the low Ag SAC alloys plus the desired thermal cycling reliability of high Ag SAC alloys. The mechanism for high drop performance and high thermal cycling reliability can be attributed to a stabilized microstructure, with uniform distribution of fine IMC particles, presumably through the inclusion of Mn or Ce in the IMC. The cyclic bending results showed SAC305 being the best and all lead-free alloys are equal or superior to SnPb. The reliability test results also showed that NiAu is a preferred surface finish for BGA packages over OSP.
thermal cycling, Reliability, lead-free
[Permanent Link to this Paper]
Posted on 2 Mar 2010
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Achieving Ultra-Fine Dot Solder Paste Dispensing
by Sunil Chhabra, Sergio Porcari, Steven Rocco Marongelli, Dr. Richard Ludwig, Dr. Ning-Cheng Lee
In order to achieve ultra-fine dot solder paste dispensing, both solder material and dispensing equipment have to be optimized. Dispensability of solder paste was evaluated in terms of “dispensing rate”, consistency of dispensing rate, and the stability of dispensing rate with time. Within the given conditions, threshold values for dispensability seem to exist for viscosity, powder size, and metal content. Small nozzle inner diameter is definitely needed to deliver a small dot size. Archimedes Metering Valve shows a greater flexibility in metering the volume than Positive Displacement Pump, primarily due to a greater sensitivity in dispensing volume to variation in pressure, and nozzle ID, besides being very sensitive to variation in encoder count. For success in high speed ultra-fine dot dispensing process, solder pastes with a low viscosity, small powder size, low metal content, and a high thixotropy are desired to deliver a high dispensing throughput. Controlwise, a high pressure and high encoder count may be promising. The consistency improves with increasing metal content, thixotropy, pressure, nozzle size, and encoder count. Viscosity, powder size, and delay time appear to have negligible effect on consistency. The stability increases with increasing flux activation temperature, and is expected to be poor for low thixotropy and low viscosity. Large powder size may cause immediate clogging, while small powder size may cold weld under repeated pressure cycling using pneumatic pump systems. In general, a very careful design and tight control of parameters discussed in this work has to be implemented in order to succeed in ultra-fine dot solder paste dispensing.
lead-free, pb-free, piston, Archimedes, fine dot, pump, SMT, surface mount, flux, solder paste, dispensability, dispensing
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Addressing the Challenge of Head-in-Pillow Defects in Electronics Assembly (Chinese)
by Mario Scalzo
Chinese version of Addressing the Challenge of Head-in-Pillow Defects in Electronics Assembly.
CHINESE LANGUAGE, halogen-free, head-in-pillow, pb-free, solder defects, solder paste, solder reliability, lead-free
[Permanent Link to this Paper]
Posted on 11 Mar 2010
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Addressing the Challenge of Head-in-Pillow Defects in Electronics Assembly (English)
by Mario Scalzo
The head-in-pillow defect has become a relatively common failure mode in the industry since the implementation of
Pb-free technologies, generating much concern. A head-in-pillow defect is the incomplete wetting of the entire solder joint of a ball-grid array (BGA), chip-scale package (CSP), or even a package- on-package (PoP), and is characterized as a process anomaly, where the solder paste and BGA ball both reflow but do not coalesce. When looking at a cross- section, it actually looks like a head has pressed into a soft pillow. There are two main sources of head-in-pillow defects: poor wetting and printed writing board (PWB) or package warpage. Poor wetting can result from a variety of sources, such as solder ball oxidation, an inappropriate thermal reflow profile or poor fluxing action. This paper addresses the three sources or contributing issues (supply, process and material) of the head-in-pillow defects. It will thoroughly review these three issues and how they relate to result in head-in-pillow defects. In addition, a head-in-pillow elimination plan will be presented with real life examples to illustrate these solutions.
lead-free, solder reliability, solder paste, solder defects, pb-free, head-in-pillow, halogen-free
[Permanent Link to this Paper]
Posted on 11 May 2009
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Advantages of Bismuth-based Alloys for Low Temperature Pb-free Soldering and Rework
by Brook Sandy, Ed Briggs, Dr. Ronald C. Lasky
The increased function of personal electronic devices, such as mobile phones and personal music devices, has driven the need for smaller and smaller active and passive components. This trend toward miniaturization, occurring at the same time as the conversion to RoHS-compliant lead-free assembly, has been a considerable challenge to the electronics assembly industry. The main reason for this is the higher reflow process temperatures required for Pb-free assembly. These higher temperatures can thermally damage the PCB and the components. In addition, the higher reflow temperatures can negatively affect the solder joint quality, especially when coupled with the smaller paste deposits required for these smaller components. If additional thermal processing is required, the risk increases even more.
bismuth, bismuth based alloys, low temperature soldering, pb-free, delamination, lead-free
[Permanent Link to this Paper]
Posted on 6 Jun 2011
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Aiming for High First-pass Yields in a Lead-free Environment
by Mario Scalzo
While the electronics manufacturing industry has been occupied with the challenge of RoHS compliance and with it,
Pb-free soldering, established trends of increasing functionality and miniaturization have continued. The increasing use of ultra-fine pitch and area-array devices presents challenges in both printing and flux technology. With the decrease in both the size and the pitch of said components, new problems may arise, such as head-in-pillow and graping defects. Print transfer efficiency of the solder paste must be maximized to maintain consistent solder volumes and acceptable solder joints; process optimization may also be a factor. Flux activators have to be redesigned to allow for the less-than-ideal soldering performance of high-tin alloys. These challenges have been met by a statistical approach to formulating solder paste rheology and flux chemistry resulting in high print efficiencies and appropriate activity release to produce high first-pass yields.
[Permanent Link to this Paper]
Posted on 3 Mar 2010
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An Effective Design of Experiment Strategy to Optimize SMT Processes
by Dr. Ronald C. Lasky, Daryl Santos PhD
It is now widely accepted that using designed experiments is the most effective way to optimize surface mount technology (SMT) processes. This situation begs the question “what is an effective strategy in implementing this powerful tool?” This paper will present such a strategy that incorporates Taguchi’s approach for screening, full factorial analysis for optimization and central composite design for precise modeling. We will present these techniques using MINITABTM Release 13 statistical software and printed circuit board industry applications.
pb-free, lead-free, design of experiments, DOE, line optimization, continuous improvement, process modeling, process improvement
[Permanent Link to this Paper]
Posted on 31 Mar 2010
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An Overview of a Successful Pb-Free Implementation
by Timothy Jensen, Dr. Ronald C. Lasky
The clock is ticking, on July 1, 2006 the WEEE Initiative will take effect. Thereafter, all electronic assemblers that sell products in Europe must be ready to convert their assembly processes to
Pb-free. The nearness of this date raises the question of what can be done to get ready. In response to this need, we will review a pioneering effort in establishing a Pb-free process.
pb-free, lead-free, WEEE, RoHS
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Applications of Solder Fortification™ With Preforms
by Dr. Ronald C. Lasky, Paul Socha, Carol Gowans
Although many have predicted the demise of through-hole components, they
are alive and well with tens of billions assembled each year. In many cases
these components are assembled by wave soldering. However, in many mixed
product technology (i.e. SMT and through-hole on the same board) products,
it makes sense to consider assembling the through-hole components with the
pin-in-paste (PIP) process. PIP has been successfully used for several decades
now; however in many cases it is not possible to print enough solder paste to
obtain an acceptable solder joint. In addition to this “solder starved” condition,
the large quantity of solder paste used to form the though-hole joint results in
excess residual flux. This residual flux can lead to difficulties in in-circuit testing
and potential surface insulation resistance concerns.
In light of the above need, solder preforms have been developed. These slugs of
solder typically come in the same sizes as 0402, 0603, and 0805 passive components.
The solder preforms are placed by the component placement machines
onto the solder deposit. This additional solder assures that an adequate solder
joint is formed with a minimum of solder paste and its residual flux.
Although PIP was an early application of solder preforms, more recently other
“solder starved” applications have emerged such as radio frequency (RF)
shields and connectors. In addition, the use of ultra thin stencils in the assembly
of miniaturized components can result in some other components being solder
starved and, hence are candidates for solder preforms.
This paper will cover the design and assembly techniques for using of solder
preforms in the “solder fortification™” needs described above. Several successful
applications will be presented. In some of these applications, defects were
reduced by 95% after implementing solder preforms.
Apex 2011, solder starvation, flux, PIP, pin-in-paste, through-hole, SMT, solder fortification, solder paste, solder preforms
[Permanent Link to this Paper]
Posted on 11 Apr 2011
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Applications of Solder Preforms to Improve Reliability
by Dr. Ronald C. Lasky, Carol Gowans
As early as the 1990s, people were predicting the end of through-hole components, but they are alive and well with the numbers of dual in-line packages (DIPs) and connectors still measured in the tens of billions per year. Many of these components are assembled by wave soldering; however, in mixed technology (SMT and through-hole on the same board) where the through-hole count is low, it is often advantageous to consider selective soldering or the pin-in-paste process (PIP). PIP is a process in which solder paste is printed over or near the PWB through-holes. The through-hole components are then placed and the solder joint is formed during the reflow process. PIP has the advantage of eliminating the wave soldering process step. In many cases it is difficult to print enough solder paste to make an acceptable through-hole solder joint. Solder preforms were developed to meet this need.
These solder preforms are typically shaped in the form of 0402, 0603, or 0805 passive components. The preforms are placed on the appropriate printed solder paste deposit by a component placement machine. Preforms come in tape & reel packaging.
Today solder preforms are also used in other “solder starved” applications such as radio frequency (RF) shields, connectors, and under QFN thermal pads. In all cases, the extra solder delivered by the preform is vital to the reliability of the assembled product.
In this paper, process, design, and assembly methods for solder fortification using preforms will be discussed. Four successful solder fortification examples will be presented along with the associated defect reductions.
solder preforms, pin-in-paste, solder fortification, solder starvation, mobile phone shields, QFN packages, flux
[Permanent Link to this Paper]
Posted on 14 Oct 2011
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Area Ratio Sensitivity
by Chris Anglin
The purpose of a solder paste print evaluation is to observe variation in transfer efficiency to the assembly process under conditions that permit careful scrutiny.
Alternative purchasing decisions and process selection reveal various methods of analysis for scrutinizing the solder paste print activity. Many of these methods are based on the assumption that all of the root causes for paste transfer efficiency during paste print trials are known and certain. However, in most cases the amount and timing of these transfer efficiencies are estimated, and uncertainties exist in the estimation process. Furthermore, there is typically much uncertainty with stencil aperture area ratio, and area ratio factors inevitably affect the purchasing criteria more than others. Thus, the printed circuit board assembly industry needs additional analysis techniques for paste evaluation in order to get explicit information on the effects of uncertainties in the stencil aperture area ratio is important.
solder paste, area ratio
[Permanent Link to this Paper]
Posted on 21 Jan 2011
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Assembling Today's Miniaturised Electronic Products
by Dr. Ronald C. Lasky
Miniaturised electronics and the advent of
lead-free soldering have added new challenges to the SMT electronic assembly process, most notably in the arenas of stencil printing and reflow. Recent work on improving these assembly processes and advances in solder paste technology can help to minimise these process challenges.
halogen-free, solder paste, solder, solder reliability, flux, pb-free, lead-free
[Permanent Link to this Paper]
Posted on 15 Mar 2009
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Assembly of PWBs in a RoHS and Non-RoHS Compliant World
by Dr. Ronald C. Lasky
The assembly of PWBs for the automotive, medical and aerospace industries creates new
challenges in a mostly RoHS compliant world. Some of the challenges arise because
these industries are partially or fully exempted, for now, from RoHS. The automobile
industry can assemble RoHS 5 (tin-lead solder paste and components with tin-lead
finished leads, the remaining hardware being RoHS compliant) PWBs, whereas the
medical and aerospace industries can assembly fully RoHS exempt electronics. For
facilities that are dedicated to one type of manufacturing, the logistics issues are reduced.
However, with the exponential increase in the use of sub-contract assemblers, some of
these facilities have to assemble the full range of product types: RoHS exempt, RoHS 5,
RoHS 5.5 (RoHS 5 with BGAs that have SAC solder balls) and RoHS 6 (fully compliant
RoHS assembly) under one roof. This situation creates not only assembly technical
challenges, but considerable material handling and logistics issues.
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Availability of Indium and Gallium (Chinese)
by Claire Mikolajczak, Bill Jackson
Chinese version of Availability of Indium and Gallium
CHINESE LANGUAGE, gallium extraction process, gallium mining, reclaiming ITO targets, indium refining capacities, tailings, slag, indium residues, indium, gallium, availability of indium and gallium, indium ores and mining, indium extraction
[Permanent Link to this Paper]
Posted on 22 May 2012
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Availability of Indium and Gallium (English)
by Bill Jackson, Claire Mikolajczak
“Long term, both
indium and gallium will be available with intermittent price volatility.” — Claire Mikolajczak
indium extraction, indium ores and mining, availability of indium and gallium, gallium, indium, indium residues, slag, tailings, indium refining capacities, reclaiming ITO targets, gallium mining, gallium extraction process
[Permanent Link to this Paper]
Posted on 23 Apr 2012
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Availability of Indium and Gallium (German)
by Claire Mikolajczak
German language version of Availability of
Indium and Gallium.
Copper Indium Gallium, CIG, German language, indium, solar, thin film technology
[Permanent Link to this Paper]
Posted on 11 Mar 2010
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Best Practices Reflow Profiling for Lead-Free SMT Assembly (Chinese)
by Ed Briggs, Dr. Ronald C. Lasky
Chinese version of Best Practices Reflow Profiling for
Lead-Free SMT Assembly.
CHINESE LANGUAGE, graping, head-in-pillow, Voids, solder balling, solder beading, tombstoning, reflow profile, solder defects
[Permanent Link to this Paper]
Posted on 22 Mar 2010
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Best Practices Reflow Profiling for Lead-Free SMT Assembly (English)
by Dr. Ronald C. Lasky, Ed Briggs
The combination of higher lead-free process temperatures, smaller print deposits, and temperature restraints on electrical components has created difficult challenges in optimizing the reflow process. Not only are the electronic components and the PWB at risk, but the ability to achieve a robust solder joint becomes difficult, especially if the PCB is thermally massive. In addition, the constant miniaturization of electronic components, hence smaller solder paste deposits, may require the use of smaller particle-sized powders. Both the small solder paste deposits and small particle size result in a large surface area-to-volume ratio that challenges the solder paste's flux to effectively perform its fluxing action. The possible resulting surface oxidation can lead to voiding, graping, head-in-pillow, and other defects. Smaller components are also more susceptible to tombstoning and defects related to solder paste slump.
This paper is a summary of best practices in optimizing the reflow process to meet these challenges of higher reflow temperatures, smaller print deposits, decreased powder particle size, and their affect on the reflow process. It also discusses trouble-shooting of the most common defects in lead-free reflow, such as tombstoning, solder beading/balling, residue discoloration, voiding, graping, and head in pillow.
solder defects, reflow profile, tombstoning, solder beading, solder balling, Voids, head-in-pillow, graping
[Permanent Link to this Paper]
Posted on 1 Jun 2009
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Challenges in Supply of Ultralow Alpha Emitting Solder Materials
by Andy C. Mackie PhD, Olivier Lauzeral (iROC)
The names of high-energy subatomic particles such as alpha, beta, gamma, x-rays and cosmic rays will be well known to every high-school student. Table 1 shows some of the most common types of particles and a description of them.
In aerospace electronics, any of these particles may be encountered and each presents a unique challenge for applications, such as satellite telecommunications. Even at sea level, much of the semiconductor packaging experts are aware of the increasing need for controlled alpha-emissions in materials that are immediately adjacent to the chip surface. This need is driven by the shrink in size of the active device (characterized by the “equivalent DRAM gate length”1) present in the active device layers of a semiconductor chip.
ultra low alpha, semiconductor packaging
[Permanent Link to this Paper]
Posted on 14 Oct 2011
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Challenges of Implementing a Halogen-Free PCB Assembly Process (Chinese)
by Timothy Jensen, Dr. Ronald C. Lasky
Chinese version of Challenges of Implementing a
Halogen-Free PCB Assembly Process.
oxidation barrier, activator, pb-free, reflow, graping, head-in-pillow, halide-free, halogen-free, halogens, CHINESE LANGUAGE
[Permanent Link to this Paper]
Posted on 22 Mar 2010
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Challenges of Implementing a Halogen-Free PCB Assembly Process (English)
by Dr. Ronald C. Lasky, Timothy Jensen
The electronics industry continues to strive to provide more environmentally friendly products. This movement is partly due to legislation from various countries, partly due to public outcry from well publicized 3rd world recycling practices, and partly due to non-government organizations (NGOs) testing and publishing information on electronic devices regarding their content of various toxic materials. One set of materials targeted for reduction and eventual elimination are halogenated compounds. Halogens are found in plastics for cables and housings, board laminate materials, components, and soldering fluxes. Replacing these halogenated compounds can have a dramatic affect on the PCB
assembly process. In this paper those challenges will be discussed as well as techniques and practices that will help ensure high end of line yields and continued reliability.
oxidation barrier, activator, pb-free, reflow, graping, head-in-pillow, halide-free, halogen-free, halogens
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Challenges of Implementing a Halogen-Free PCB Assembly Process
by Timothy Jensen, Dr. Ronald C. Lasky
The drive to produce halogen-free electronics has grown significantly, driven partly by legislation and partly by environmentalist organizations. This paper will discuss the challenges of implementing such a halogen-free assembly process. It will start by briefly discussing the reasons that “halogen-free” is with us. The PCB materials that might contain halogens will then be presented. PWB and component concerns will be briefly reviewed. The bulk of the paper will center on the process development issues in establishing a halogen-free assembly process, including solder paste evaluation and selection, solder fluxes, the SMT stencil printing process, reflow and test. Comparisons between halogen containing and halogen-free solder pastes regarding their process performance and reliability will also be presented. The paper will close with a brief review of techniques to analyze halogen content in materials and some of the pitfalls if inappropriate tests are used.
halogen-free
[Permanent Link to this Paper]
Posted on 11 May 2009
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Challenges of Miniaturization
by Dr. Ronald C. Lasky
It is likely that a modern mobile phone has more computing power than all of the computers that NASA used to send men to the moon in the late 1960s. This idea is especially interesting when one considers that the electronics of that era had almost no integrated circuits (ICs) and that many computer circuits were individual transistors, resistors, and capacitors. Today's PC microprocessors have the equivalent of hundreds of millions of these components, all electrically connected in the IC. Such miniaturization has enabled the electronics revolution.
PCB assembly, electronics assembly, solder joint, solder paste
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Changing to Pb-free Profoundly Impacts the Manufacturing Production Process
by Vahid Goudarzi, David Day, Richard Brooks
This paper will outline the issues relating to the implementation of a
Pb-free solder paste into a
standard Sn/Pb manufacturing facility and product. The Pb-free study includes the compatibility and impact on the various manufacturing processes that include, printing, component placement, reflow process, and solder joint quality.
These parameters must be fully characterized to ensure that the lead-free solder paste meets the manufacturing and product quality requirements. In addition, a lower super heat temperature is critical to reduce the thermal stress on components, since the lead-free alloy composition (Sn/Ag/Cu) liquefies at about 34 C higher than the current leaded material (63Sn/37Pb). Several implementation issues were discovered during the pilot phases and resolved prior to full-scale production manufacturing. Some of the problems revealed were BGA voiding, chip component tombstoning, and component integrity as it relates to termination plating and moisture sensitivity.
pb-free, lead-free
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Choosing a Low-Cost Alternative to SAC Alloys for PCB Assembly
by Dr. Ronald C. Lasky, Brook Sandy
Developing low-cost alternatives to near-eutectic SAC alloys for Pb-free assembly is crucial to continue producing affordable electronics products. Metals prices, especially silver, have been on the rise, and will likely stay at their near historic high levels. Solder alloys with lower silver content have been considered with trade-offs in performance, but are there alternatives?
There are many reasons to consider alternative Pb-free alloys to SAC305. Several new alloys have been recently introduced, while others, which had little popularity in the past, are showing more potential due to changes in the industry. The question is: how much do subtle variations in alloy composition affect the performance and process requirements of PCB assembly? This paper will compare some of these alloys side-by-side and discuss whether existing processes need to be modified for alternative alloys.
Apex 2012, SAC, pb-free, lead-free, solder alloy
[Permanent Link to this Paper]
Posted on 14 Oct 2011
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Choosing a Pb-Free Solder Paste
by Chris Nash
With all the different
Pb-Free solder pastes on the market today, how does anyone choose the correct solder paste that will ensure finished goods reliability? The answer lies within the hands of the experts. A few quick phone calls to the solder paste manufacturer and you will be building Pb-Free printed circuit boards in no time.
pb-free, lead-free
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Combining superior anti-oxidation and superior printing
by Dr. Ning-Cheng Lee
While miniaturization is the dominant trend, the drive toward cost reduction and environmentally sustainable manufacturing is also important. The latter is best exemplified by the requirement of lead-free soldering as dictated by the European RoHS legislation. The cost reduction trend is well illustrated by the iNEMI roadmap, which predicts that by 2015 operating costs will drop to 40 % of the 2003 level. This is likely to occur through multiple practices, such as reflowing in air instead of nitrogen and the reduction in cycle time and setup time.
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Comparison of Test Methods for High Performance Thermal Interface Materials
by Bob Jarrett, C.K. Merritt, Jordan Ross, Jim Hisert
This paper relates the application of two of the methods for testing the
thermal interface materials to the development and characterization of high performance materials. Particular strengths of different test methods provide a more complete understanding of TIM performance. In combination the tools provide effective development and improvement metrics. The limitations in resolution and repeatability are discussed.
thermal test vehicle, ASTM D5470, TIM testing
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Compatibility of Polymers and Fluxes: Getting to the Heart of the Matter
by Chris Nash, Andy C. Mackie PhD
Few things strike more dread in the hearts of technical service personnel than the words: “Is your
flux compatible with material XYZ?” This issue is especially difficult if XYZ polymerizes (cures). The customer’s expectation is that there will be an unequivocal yes-or-no answer, yet there is a myriad of complexities behind which the question that materials suppliers and users alike are sometimes unaware. This question may come from engineers in any of the fields of SMT (surface mount technology) to power semiconductor die-attach to flip-chip underfill.
This paper explains customer fears that lie behind the compatibility question; gives a better concept of what may be in the customer’s mind when they ask if a material is “compatible”; and also explains potential failure modes, main control parameters, and what test methods are currently available to test “compatibility”.
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Conquer Tombstoning in Lead-Free Soldering
by Dr. Benlih Huang, Dr. Ning-Cheng Lee
Tombstoning of SnAgCu is affected by the solder composition. At vapor phase soldering, both wetting force and wetting time at a temperature well above the melting point have no correlation with the tombstoning behavior. Since tombstoning is caused by unbalanced wetting force, the results suggest that the tombstoning maybe dictated by the wetting at the onset of paste melting stage. A maximal tombstoning rate is observed at 95.5Sn3.5Ag1Cu. The tombstoning rate decreases with increasing deviation in Ag content from this composition. DSC study indicates that this is mainly due to the increasing presence of pasty phase in the solders, which is expected to result in a slower wetting speed at the onset of solder paste melting stage. Surface tension plays a minor role, with lower surface tension correlates with a higher tombstoning rate. SnAgCu composition with a Ag content lower than 3.5%, such as 2.5Ag, is more favorable in terms of reducing tombstoning rate with minimal risk of forming AgSn intermetallic platelet.
pb-free, tombstoning, solder, soldering, solder paste, flux, lead-free, surface mount
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Control Lead-Free Tombstoning via Alloy Composition
by Dr. Benlih Huang, Dr. Ning-Cheng Lee
Effect of solder alloy composition and properties on tombstoning of SnAgCu has been investigated. Both wetting force and wetting time at a temperature will above the melting point have no correlation with the tombstoning behavior observed at vapor phase soldering. Since tombstoning is caused by unbalanced wetting force, this unbalanced wetting force may occur at the onset of melting DSC study indicates that the tombstoning rate decreases with increasing pasty temperature range and increasing mass fraction of solid in solder at onset of melting. This slower wetting in turn results in a more balanced wetting force and accordingly reduces the tombstoning. The mass fraction of solid may be the more essential factor. Surface tension also plays a role, with lower surface tension correlates with a higher tombstoning rate. Tombstoning of SnAgCu can be regulated by the solder composition. A maximal tombstoning rate is observed a 95.5Sn3.5Ag1Cu. The tombstoning rate decreases with increasing deviation in Ag content from this composition, particularly toward the end of lower Ag content. SnAgCu composition with a Ag content lower than 3.5%, such as 2.5Ag, is more favorable in terms of reducing tombstoning rate with minimal risk of forming Ag3SN intermetallic platelet.
tombstoning, solder, soldering, solder paste, flux, lead-free, surface mount, pb-free
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Correlation of SIR, Halide/Halogen, and Copper Mirror Tests
by Nicole Palma, Dr. Ronald C. Lasky
With the advent of RoHS and WEEE and the concern of some companies to eliminate halogen-containing compounds from their products, it is vital to have an understanding of halogen compounds and how to detect them. Halogens are a series of nonmetal elements from Group 17 in the periodic table. These elements are fluorine, chlorine, bromine, iodine, and astatine. A halide ion is a halogen atom bearing a negative charge. Halides can be part of the flux activator system that aid in oxide removal in either a solder paste or flux for wave soldering.
Halide content can be determined by qualitative or quantitative tests. The silver chromate method is a quick and inexpensive qualitative test method used to determine halides in a flux. This test is performed by placing the flux on silver chromate test paper. The halides in the flux react with the silver chromate and produce a characteristic color change on the test paper. A quantitative measure of halides is done by ion chromatography. This quantitative test is quite expensive and time consuming.
Test methods have also been developed to determine the activity of the fluxes in solder paste and wave solder. Most commonly used are the copper mirror and surface insulation resistance (SIR) tests. Copper mirror testing determines the activity of the flux by the effect the flux has on bright copper mirror films, which have been vacuum deposited on clear glass. Based on J-STD 004B, the flux can be classified based on its activity levels as determined by this test.
SIR is an electrical test that measures a change over time in the electrical current between electrodes on the surface of a PCB. It is performed at high temperature and humidity levels, typically 85°C and 85% RH. Ionic residue, left on the PCB after reflow from flux activators, may cause low (i.e., poor) SIR readings.
This paper will discuss the theories behind these test techniques, their differences, and how the presence of halides in the flux activators will affect the SIR and copper mirror results.
Apex 2012, silver chromate, flux, copper mirror, SIR, halides, halogens, ion chromatography
[Permanent Link to this Paper]
Posted on 14 Oct 2011
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Defect Elimination Through Process Refining and Proper Material Choice
by Mario Scalzo
While Global electronics manufacturers have been engaged with meeting the challenges of the European Union's Restrictions on Hazardous Substances, and with it soldering, continued Research & Development have pushed the limits of
solder paste with increased board functionality and miniaturization have continued. This miniaturization increases the use of ultra-fine pitch components and chip-scale packages (CSP's), presenting hard to overcome hurdles in both solder paste flux and process technology. New problems have arisen, such as head-in-pillow and graping defects. Solder paste print transfer efficiency must be maximized to maintain consistent solder volumes and acceptable solder joints, and process optimization must be scrutinized to maintain high first-pass yields. Flux activators have to be redesigned to allow for the less-than-ideal soldering performance of high-tin alloys. These challenges have been met by a statistical approach to optimizing printing, as well as solder paste rheology and flux chemistry resulting in high print efficiencies and appropriate activity release to produce an efficient process.
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Die Attach in Lead Frame Packages: A Tutorial
by Frank Komitsky Jr., Dr. Ronald C. Lasky
Although much of the “buzz” in the industry surrounds the newer “high tech” packages such as ball grid array (BGA), chip scale packages (CSP) and flip chip, the foundation of modern electronics is the lead frame package. The major lead frame packages small outline integrated circuits (SOICs) and plastic quad flat packs make up the bulk of all surface mount integrated circuit packages manufactured in the world. See Figure 1. With 70 billion produced in 2004, they represent about 70% of all surface mount packages. So many are made, that every man, woman and child on earth could be given 11 of these packages each year. Laid end to end, a year’s worth of production of these packages would reach farther than from the earth to the moon and back.
semiconductor packaging, semiconductor assembly, lead frame, die attach
[Permanent Link to this Paper]
Posted on 19 May 2010
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Dispelling 10 Myths About Nitrogen Reflow
by Andy C. Mackie PhD
In my twenty years in the electronics manufacturing industry, I have heard a lot of claims made about the use of nitrogen in inerted soldering processes: many of them completely wrong.
In this paper, we will talk about reflow in an enclosed oven, although many of these discussions may pertain to wave soldering and even vacuum soldering.
electronics manufacturing, reflow, soldering
[Permanent Link to this Paper]
Posted on 24 Jan 2011
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Down-Selecting Low Solids Fluxes for Pb-free Selective Soldering
by Mario Scalzo, Todd O'Neil
Although many predicted the demise of through-hole components, they are alive and well with tens of billions used each year. In mixed SMT/through-hole PCBs, through-hole components, and especially connectors, are often used for their mechanical robustness. A typical example would be a USB connector in a laptop PC. Typically an SMT connection just doesn't have the mechanical robustness needed to support multiple connector plug-in and removals. However, performing a full wave soldering process to assemble a few through-hole components on a mostly SMT PCB doesn't usually make economic sense and may damage the PCB. In such situations, the best option is often to assemble the through-hole components and connectors with a selective soldering process.
This paper touches on identifying favorable flux properties, down-selecting low solids fluxes for lead-free selective wave soldering, the selective soldering process itself, and testing criteria. Topics reviewed will be the flux selection, optimizing the selective soldering process by varying the flux concentration, pre-heat parameters, soldering temperatures, and dwell time. The paper will finish with a summary of the work and a systematic process to select a flux and optimize the selective soldering process for high yields and quality.
flux, pb-free, lead-free, selective soldering, SMT, through-hole, PCB assembly, Apex 2011
[Permanent Link to this Paper]
Posted on 11 Apr 2011
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Drop Test Performance of BGA Assembly Using SAC105Ti Solder Spheres
by Jason Bragg, Russell Brush, Polina Snugovesky, Blake Harper, Simin Bagheri, Dr. Ning-Cheng Lee, Dr. Weiping Liu
Board-level drop test performance was evaluated and compared for the following four different solder combinations in BGA/CSP assembly: 1) SnPb paste with SnPb balls, 2) SnPb paste with SAC105Ti balls, 3) SAC305 paste with SAC105Ti balls, and 4) SAC305 paste with SAC105 balls. The presence of Ti improved the drop test performance significantly, despite the voiding side effect caused by its oxidation tendency. It is anticipated that the voiding can be prevented with the development of a more oxidation-resistant flux. The consistently poor drop test performance of 105Ti/SnPb is caused by the wide pasty range resulting from mixing SAC105Ti with Sn63 solder paste. The effect of Ti in this system is overshadowed by the high voiding outcome due to this wide pasty range material. In view of this, the use of a SAC105 BGA with an SnPb solder paste is not recommended, with or without the Ti addition. High reflow temperatures drove the fracture to shift to the interface at the package side, presumably through building up the IMC thickness beyond the threshold value. A lower reflow temperature is recommended. The electrical response is consistent with the complete fracture data, but the complete fracture trend is inconsistent with that of the partial fracture trend, and neither data can provide a full understanding about the failure mode. By integrating the complete fracture and the partial fracture into a “Virtual Fracture”, the failure mechanism becomes obvious and data sets become consistent with each other.
SAC305, solder paste, SAC105Ti, SAC, solder sphere, lead-free, drop test, Apex 2012
[Permanent Link to this Paper]
Posted on 14 Oct 2011
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Effect of Lead-Free Alloys on Voiding at Microvia
by Dr. Arnab Dasgupta, Dr. Benlih Huang, Dr. Ning-Cheng Lee
For SnAgCu solder, the voiding rate at microvia was studied with the use of simulated microvia, and was the lowest with 95.5Sn3.8Ag0.7Cu and 95.5Sn3.5Ag1Cu, and increased with further decrease in Ag content. Results indicated that voiding at microvia was governed by via filling and exclusion of fluxes. The voiding rate decreased with decreasing surface tension and increasing wetting force which in turn was dictated by the solder wetting or spreading. Both low surface tension and high solder wetting prevented the flux from being entrapped within microvia. A fast wetting speed might also facilitate reducing voiding. However, this factor was considered not as important as the final solder coverage area.
pb-free, reflow, surface mount, microvia, voiding, void, lead-free, soldering, solder
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Effect of Nano-Coated Stencil on 01005 Printing
by S. Manian Ramkumar Ph.D., Rita Mohanty Ph.D., CEMA, Chris Anglin, Toshitake Oda
The demand for product miniaturization, especially in the handheld device
area, continues to challenge board assembly industry. The desire to incorporate
more functionality while making the product smaller continues to push board
design to its limit. It is not uncommon to find boards with castle like components
right next to miniature components. This type of board poses special
challenge to the board assemblers as it requires wide range of paste volume
to satisfy both small and large components. One way to address the printing
challenge is to use creative stencil design to meet the solder paste requirement
for both large and small components. Example of stencil design includes step
stencil, dual printing, over size aperture, etc. Stencil printing process at its
most basic level involves pushing solder paste through a stencil (with various
size apertures) by a squeegee blade. As the squeegee blade and the stencil
are in constant contact with the paste during the printing process, their surface
characteristics play an important role in the printing process. The most
important attribute of a stencil is its release characteristic. In other word, how
well the paste releases from the aperture. The paste release in turn depends on
the surface characteristics of the aperture wall and stencil foil surface. Recent
introduction of a new technology, Nano-coating for both stencil and squeegee
blades, has drawn the attention of many researchers. As the name implies,
Nano-coated stencils and blades are made by conventional method such as
laser cut or Electoform then coated with nano functional material to alter the
surface characteristics. This study will evaluate nano-coated stencils for passive
component printing including 01005. Various print experiments will be
conducted using different stencil technology, stencil thicknesses, aperture size,
aperture orientation, aperture shapes, and selected paste type with optimal
print parameters, to understand the effect of chosen factors on the print quality.
Print quality will be determined by visual inspection and 3D measurement of
the paste deposit to understand the volume transfer efficiency.
Apex 2011, solder paste, transfer efficiency, area ratio, stencil technology, broadband printing, nano-coated stencil
[Permanent Link to this Paper]
Posted on 11 Apr 2011
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Electrically Conductive Ink: Capabilities and Limitations
by Dr. Ning-Cheng Lee
Electrically conductive inks are a critical component in printed electronics. This article examines many of the formulations available and describes their characteristics.
binder, filler
[Permanent Link to this Paper]
Posted on 1 Jul 2010
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Electromigration vs. SIR
by Dr. Ning-Cheng Lee, Dr. Mikolaj E. Jozefowicz
The IPC-SF-818 Surface Insulation Resistance (SIR) test data taken with the use of a variety of
halide-free no clean fluxes are analyzed against Bellcore TR-NWT-000078 Electromigration (EM) test data. Neither test results show correlation with bulk flux resistivity, flux water extract resistivity, flux residue moisture pickup, and flux corrosivity without bias. However, in the case of rosin fluxes, the insulation resistance behavior in both SIR and EM tests is a function of pH value of fluxes. This phenomenon is more profound in SIR test. In the case of low residue no clean fluxes, only SIR test displays such a pH dependent relationship. Data suggest that the 50 volts bias voltage used in SIR test may be responsible for this, and can be explained with a high-bias-voltage-induced electrolysis mechanism which is further promoted by a high pH environment. This failure mechanism is absent in EM test which utilizes 10 volts bias voltage, and probably will not occur at normal 5 volts application condition. Overall, the SIR test seems to be more stringent while the EM test appears to be more realistic.
lead-free, pb-free, no-clean, surface insulation resistance, EM, flux, soldering, solder, electromigration, SIR
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Eliminate Lead-free Wave Soldering (English)
by Karl Pfluke, Richard H. Short
The advent of Lead-Free Soldering presents many manufacturers with the need to Wave Solder using
Lead-Free Alloys. These alloys melt and are soldered at temperatures well above conventional SNPB processing temperatures. This creates several well-documented problems. This article offers a proven and practical alternative to the Lead-Free Wave Soldering Process.
lead-free, wave solder flux, pb-free, Rework, solder preforms, solder paste, solder reliability
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Eliminate Lead-free Wave Soldering (German)
by Karl Pfluke, Richard H. Short
German version of Eliminate Lead-free Wave Soldering.
lead-free, wave solder flux, German language, pb-free, Rework, solder preforms, solder paste, solder reliability
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Engineering Solder Paste Performance Via Controlled Stress Rheology Analysis
by Dr. Anu Maria, K. P. Rangan, Rajkumar B. Raj, Dr. Ning-Cheng Lee, Dr. Xiaohua Bao
Rheology of a solder paste has a significant effect on its stencil printing, tack, and slump performance. This paper describes a series of tests designed to investigate the rheological properties of a suite of solder pastes and fluxes, and the correlation with the solder paste performance prior to reflow. Data indicate that 1) print defect is proportional to the compliance (J1 and J2) and inversely proportional to the elastic properties (G’/G’’ and Recovery) and meta-rigidity (Yield Stress); 2) slump resistance is proportional to elastic properties (Recovery), solid characteristics (Stress [G’=G’’]), and rigidity ( êG* ê); 3) high elastic properties (Recovery), low compliance (J1 and J2), and low solid characteristics (Stress [G’=G’’]) are required in order to achieve high tack value. Good correlation between fluxes and solder pastes are observed for Yield Stress and Recovery only, suggesting those two properties are primarily dictated by fluxes.
lead-free, pb-free, viscosity, flux, tack, slump, print, rheology, solder paste, soldering, solder
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Epoxy Flux – A Low Cost High Reliability Approach for PoP Assembly
by Dr. Ning-Cheng Lee
Package-on-package (PoP) is a packaging that rapidly prevails in mobile devices of the electronic industry, due to its flexibility in combining memory and processor into one component with a reasonably low profile. However, similar to BGA, the solder joints of assembled PoP are prone to cracking upon dropping onto the floor, thus needing reinforcement by underfilling. The underfilling process needs an underfill material plus additional dispensing equipment, dispensing and flowing steps, and subsequent time-consuming curing. Furthermore, underfilled PoP suffers solder extrusion upon rework, particularly when reworking at the opposite side of the board right underneath the PoP. Epoxy flux is a new material developed to address the issues described above; it is a liquid epoxy with fluxing power, and it is compatible with solder paste. Applied by a dipping process, epoxy flux can be used at the mounting of bottom package and top package. First, the bottom package is dipped in a film of epoxy flux, and then placed onto the footprint pad on a PCB with or without solder paste. Then, the top package is dipped in epoxy flux and placed on top of the bottom package. The PCB with a stacked PoP is subsequently reflowed in the oven together with other surface mount components placed on printed solder paste. Epoxy flux combines soldering and reinforcement into one single process. With a controlled pick up flux volume, a venting channel is formed, allowing outgassing at reflow. The low stress characteristics of epoxy flux prevents the formation of solder extrusion. Overall, epoxy flux provides a low cost and high reliability solution for PoP assembly.
Reliability, soldering, assembly, PoP, package-on-package, epoxy flux
[Permanent Link to this Paper]
Posted on 14 Oct 2011
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Establishing a Precision Stencil Printing Process for Miniaturized Electronics Assembly
by Chris Anglin
The advent of miniaturized electronics for mobile phones and other portable devices has required the assembly of smaller and smaller components. Currently 01005 passives and 0.3mm CSPs are some of the components that must be assembled to enable these portable electronic devices. It is widely accepted that about 65% of all end of the line defects occur in the stencil printing process. Given all of the above it is critical that a precision stencil printing process be developed to support miniaturized electronic assembly.
This paper will be a summary of a significant amount of experimental data and process optimization techniques that were employed to establish precision SMT printing process. Our results indicate that the industry standard stencil aperture aspect ratio requirement of > 0.66 is an excellent rule of thumb. However, by optimizing printer setup with vacuum support, foil-less clamps, squeegee edge guards etc and assuring cleanliness and squeegee and stencil quality, we have been able to obtain acceptable stencil printing results with area ratios of 0.5 with Type III solder pastes. The work that was performed to achieve these results will be discussed in detail in the paper.
halogen-free, solder paste, solder, solder reliability, flux, solder quality, stencil printing
[Permanent Link to this Paper]
Posted on 11 May 2009
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Evaluation of Test Protocol for Eutectic Die-Attach Using High Power LEDs
by Amanda Hartnett, Daniel Evans Jr., Don Beck, Seth Homer
High-power semiconductor devices, such as high-brightness LEDs, must be mounted using a robust die-attach material that can handle the temperature fluctuations generated by the chip and mechanical stresses due to CTE mismatches between the die material and substrate to which it is mounted. The selected material must also comply with current legislation, which restricts manufactured products containing numerous materials due to environmental concerns, including some that were historically popular in this application. Eutectic gold-tin (AuSn) materials meet these requirements, and process recommendations for their implementation will be presented.
Utilizing Palomar Technologies’ die bonder, AuSn solder preforms and solder paste will be placed/dispensed and reflowed using a Pulse Heat System (PHS). Evaluation methods comparing these means of eutectic die-attach to a pre- plated AuSn die will be discussed. Technical generalizations will be detailed to explain the derivation of test method as well as hypotheses of results.
gold-tin solder, LED, die bonder, solder preforms, solder paste, automated pick-and-place, eutectic die-attach, solder spread
[Permanent Link to this Paper]
Posted on 14 Oct 2011
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Fine Feature Stencil Printing 0.3MM Pitch Components (Chinese)
by Ed Briggs, Dr. Ronald C. Lasky, Chris Anglin
Chinese version of Fine Feature Stencil Printing 0.3MM Pitch Components
CHINESE LANGUAGE, solder paste, stencil printing, miniaturization
[Permanent Link to this Paper]
Posted on 13 May 2011
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Fine Feature Stencil Printing 0.3MM Pitch Components (English)
by Chris Anglin, Dr. Ronald C. Lasky, Ed Briggs
The explosive growth of personal electronic devices such as mobile phones and personal music devices has driven the need for smaller and smaller passive and active electrical components. Not too long ago, 0401 (40 x 10 mils) passives were seen as the ultimate in miniaturization, but recently 0201 and now 01005 passives have arrived, with rumors of even smaller sizes to come. For active electrical components, the 0.4mm pitch component has become commonplace with 0.3mm already in the works. What effect does this miniaturization have on the stencil printing process? Can it meet the challenge? This paper takes a preliminary look at some of the work that has been performed to evaluate the capability of the stencil printing process to print these fine feature components. Discussed is the stencil printing of the small features and efforts to obtain consistent volume in the printed solder paste deposit.
miniaturization, stencil printing, solder paste
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Fine Powder Solder Pastes: Stencil Printing and Reflow in Lead-Free Assembly
by Chris Anglin, Dr. Ronald C. Lasky, Ed Briggs, Timothy Jensen
The explosive growth of personal electronic devices, such as mobile phones and personal music devices, have driven the need for smaller and smaller active and passive electrical components. Not too long ago, 0401 (40 x 10 mils) passives were seen as the ultimate in miniaturization, but recently 0201 and now 01005 passives have arrived, with rumors of even smaller sizes to come. For active components, the 30 mil CSP (a chip scale package with the solder balls on 30 mil (0.75mm) centers) has become virtually a requirement for enabling the many features in modern portable electronic devices. The more than 1 billion mobile phones assembled in 2008 will use the lion’s share of the 12 billion or so CSPs concurrently manufactured.
This miniaturization trend occurring at the same time as the conversion to RoHS compliant lead-free assembly has put a considerable strain on the electronic assembly industry. This paper will discuss some of these challenges and the work that has been performed to mitigate them. Among the challenges discussed are stencil printing the small features and obtaining consistent volume in the printed solder paste deposit, minimizing the oxidation of the solder powder in the small deposit during reflow, and assuring a good finished solder joint after the reflow process.
area ratio, Print Study, Fine Powders
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Flux Chemistry for Pb-Free SMT
by Dr. Ronald C. Lasky, Ed Briggs
In order to meet the European directives, WEEE (Waste Electrical and Electronic Equipment, effective Aug 2005) and RoHS (Restriction of Hazardous Substances, effective July 2006), high tin-containing alloys have entered the market as
lead-free options. For surface mount technology, the more popular of these high tin options are the SAC alloys (Sn/Ag/Cu). Unfortunately, SAC alloys have a higher melting point and exhibit poor wettability compared to Sn/Pb eutectic alloys.
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Full Metal TIMs (Chinese)
by Ross B. Berntson, Bob Jarrett, Jordan Ross
CHINESE LANGUAGE, TIM
[Permanent Link to this Paper]
Posted on 11 Mar 2010
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Full Metal TIMs (English)
by Bob Jarrett, Jordan Ross, Ross B. Berntson
Metal thermal interface materials (TIMs) offer substantially higher thermal conductivity than other commercially available TIMs. With this high conductivity, these metal TIMs offer the lowest thermal interface
resistance, enabling design of higher power and smaller electronic devices. Additionally, the high conductivity translates to less sensitivity to bond line thicknesses and coplanarity issues than polymeric TIMs. This paper discusses the use of metal thermal interface materials
in critical heat flow situations.
TIM
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Future Lead-Free Solder Alloys and Fluxes-Meeting Challenges of Miniaturization
by Dr. Ning-Cheng Lee
In general,
new lead-free solder alloys with the following characteristics are desired in order to enable the continuation of miniaturization trend: (1) alloy with a reduced melting temperature, (2) alloy with a better solder spread, (3) alloy with a slower wetting speed at melting temperature, (4) a softer alloy, or alloy with a reduced voiding tendency or greater ductility, (5) alloy with a refined grain size, (6) alloy with low tendency to form large IMC plate, (7) alloy with a higher resistance toward corrosion and electrochemical migration, (8) alloy with a greater oxidation resistance. On the other hand, no-clean fluxes with the following features are needed: (1) reduced volatile, (2) halide-free, (3) greater fluxing
capacity, (4) higher residue resistivity, (5) more resistant to oxidation and charring, (6) more efficient oxidation barrier, (7) lower activation temperature, (8) slower wetting speed when solder begins to melt, (9) less spattering, (10) higher probe penetratability, (11) capability of inducing nucleation of solder upon cooling, and (12) greater resistance against slump.
SAC, solder joint, soldering, flux, solder alloy, lead-free
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Getting Ready For Lead Free Solders
by Dr. Ning-Cheng Lee
This paper reviews the status of
lead-free solder developmental works. Some of the solder systems, Bi-Sn, Bi-Sn-Fe, In-Sn, Sn, Sn-Ag, Sn-Ag-Zn, Sn-Ag-Zn-Cu, Sn-Bi-Ag, Sn-Cu, Sn-Cu-Ag, Sn-In-Ag, Sn-Sb, Sn-Zn and Sn-Zn-In are discussed in more details, while the others are briefly commented on. In general, compared with eutectic Sn-Pb solder, all the lead-free solder alternatives investigated more or less exhibit some shortcomings, such as price, physical, metallurgical, or mechanical properties. Relatively, Sn-In-containing systems are more promising in terms of solder mechanical properties and soldering performance, although the price of In may be a concern. Eutectic Sn-Ag solder doped with Zn, Cu, or Sb exhibits good mechanical strength and creep resistance, due to refined microstructure. The Bi-Sn systems doped with other elements may have a niche in the low temperature soldering field. Eutectic Sn-Cu has a good potential due to its good fatigue resistance. Eutectic Sn-Zn system modified with In and/or Ag may be promising in mechanical properties. Finding a lead-free alternative for high temperature solders presents the biggest challenge to the industry.
solder, soldering, lead-free, electronic, tin, lead, pb-free
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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Head-in-Pillow: The Defect that Caught Us Napping (Chinese)
by Timothy Jensen
Chinese version of Head-In-Pillow: The Defect that Caught Us Napping.
head-in-pillow, CHINESE LANGUAGE
[Permanent Link to this Paper]
Posted on 22 Mar 2010
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Head-in-Pillow: The Defect that Caught Us Napping (English)
by Timothy Jensen
Although the head-in-pillow defect is not totally new, the high frequency of occurrence is. This defect is a direct result of the convergence of product miniaturization and the transition to
Pb-free solders.
head-in-pillow
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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High Melting Lead-Free Mixed BiAgX Solder Paste System
by HongWen Zhang, Dr. Ning-Cheng Lee
Although lead-free soldering has been main stream in the industry since 2006 with the replacement of the eutectic SnPb system by the SnAgCu system, the development of drop-in lead-free alternatives for high melting high lead solder alloys is still far from mature. The BiAg alloy exhibits acceptable bulk strength, but very poor ductility and wetting. Therefore, it is not acceptable as an option. In this current work, a mixed-powder BiAgX solder paste system has been developed as a viable alternative high temperature lead-free solder. The metal powder in the paste is composed of a high-melting first alloy powder as a majority and the additive powder as a minority. The additive contains a reactive element to react with various metallization surface finishes. The additive will melt and react on the parts before or together with the melting of the majority solder. The reactive element in the additive is designed to be converted completely into IMCs during the reflow process, resulting in a high-melting solder joint. In the mixed-powder paste system, a melting temperature above 260°C was verified by both DSC and TMA data. The mixed-powder solders show significantly improved wetting compared to Bi/11Ag. The voiding and TCT performance are comparable with high-lead solders. The IMC layer thickness of the mixed-powder system is insensitive toward thermal aging at 175°C while the high-lead solders show a considerable increase. The fine and well-dispersed Ag particles in the joint, together with the controlled IMC thickness, are attributed for the reliability improvement.
Apex 2012, solder paste, pb-free, lead-free
[Permanent Link to this Paper]
Posted on 1 Mar 2012
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High Technology Challenge: Assembling Today's Miniaturized Electronics Products
by Dr. Ronald C. Lasky
If asked what technology product defines today, one might first answer the personal computer (PC). Although, 10 or 15 years ago that might have been the right answer, a little more thought will show that the mobile phone is today's technologically defining product. Sheer numbers tell the story: over 1 billion mobile phones are manufactured each year. Considering that the population of the world is about 6.5 billion souls, 1 billion mobile phones each year is an astounding number. In addition, a mobile phone is likely the most multi-functional personal device in existence. Just think, it can be a phone, camera, personal data assistant, web surfer, email device, text messenger, GPS device, portable music player, portable video player, streaming audio and video player, miniature PC, and probably a few more things. To package and assemble all of this electronic functionality in such a small device is a challenge indeed. This paper will discuss some of the assembly challenges of such miniaturized electronics.
lead-free, graping, stencil printing, solder paste
[Permanent Link to this Paper]
Posted on 4 Mar 2010
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High Temperature Lead-Free Solder Joints Via Mixed Powder System
by Dr. Ning-Cheng Lee, HongWen Zhang
Although lead-free soldering has been the main stream of industry since 2006, with the replacement of eutectic SnPb system by SnAgCu system, the development of drop-in lead-free alternatives for high melting high lead solder alloys is still far from mature. BiAg alloy exhibits acceptable bulk strength but very poor ductility and wetting, therefore it is not acceptable as an option. In current work, a mixed powder BiAgX solder paste system has been developed as a viable alternative, high temperature lead free solder. The metal powder in the paste is composed of a high melting first alloy powder as majority and the additive powder as minority. The additive contains a reactive element to react with various metallization surface finishes. The additive will melt and react on the parts before or together with the melting of the majority solder. The reactive element in the additive is designed to be converted completely into IMCs during the reflow process, hence resulting in a high melting solder joint. In the mixed powder paste system, a melting temperature above 260°C was verified by both DSC and TMA data. The mixed powder solders show a significantly improved wetting comparing to Bi11Ag. The voiding and TCT performance are comparable with high lead solders. The IMC layer thickness of the mixed powder system is insensitive toward thermal aging at 175°C, while the high lead ones do show a considerable increase.
BiAg, voiding, wetting, mixed alloy, solder joint, solder paste, solder, lead-free, high temperature
[Permanent Link to this Paper]
Posted on 20 Oct 2011
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Implementing Pb-Free Assembly at Your Factory
by Timothy Jensen, Dr. Ronald C. Lasky
lead-free, pb-free
[Permanent Link to this Paper]
Posted on 31 Mar 2010
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Influence of Reflow Profile and Pb-Free Solder Paste in Minimizing Voids for Quad Flat Pack No-Lead (QFN) Assembly
by Harish Gadepalli, Rangaraj Dhanasekaran, Dr. S. Manian Ramkumar, Timothy Jensen, Ed Briggs
Quad Flatpack No lead (QFN) packages have become a popular choice in electronics packaging due to its small form factor. They are also gaining rapid industry acceptance because of its excellent thermal and electrical performance. The bottom side of the QFN package has a large thermal pad. This exposed die attach pad effectively conducts heat to the PCB and also provides a stable ground connection. Effective soldering of this surface to the pad on the PCB is required for good thermal dissipation and component functionality. The exposed thermal pad presents various challenges during the surface mount assembly process. One major challenge is solder void formation. Voids are primarily formed due to the entrapment of volatiles in flux outgassing during the reflow process.
The primary objective of this study is to determine optimal parameters to minimize void formation in QFN packages (QFN16 and QFN20), specifically the reflow profile, leadfree solder paste and stencil aperture opening for the thermal pad. A systematic DOE based approach was used to arrive at conclusions, using the ratio of void volume on the thermal pad to the actual volume of solder paste printed as the response variable. Various graphs are presented to understand the impact of different parameters. Interaction graphs were used to determine optimal settings for each parameter.
reflow profile, lead-free, voiding, solder paste
[Permanent Link to this Paper]
Posted on 21 Jan 2011
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InTEGRATED® preforms - Reflow Methods
by Paul Socha
Solder fabrications, generally referred to as
preforms, can be made to fit many different and unique applications. Preforms are designed to have a particular shape and deliver a specified volume of solder to the solder joint. Preforms can be divided into two subclasses: conventional, where the preforms are punched from solder ribbon, and InTEGRATED® preforms, which are chemically etched from solder foil. In this article, we will discuss how InTEGRATED® preforms are used and, in particular, methods that are frequently utilized to reflow them to maximize quality and production.
halogen-free solder paste, halogen-free, head, pillow, head in pillow defect, integrated preforms
[Permanent Link to this Paper]
Posted on 8 Mar 2010
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InTEGRATED® preforms Streamline Soldering
by Paul Socha
InTEGRATED® preforms are linked solder preforms that allow manufacturers to place a cluster of solder units in position on a board in one quick motion rather than placing the preforms individually in multiple motions. This revolutionary process simplifies the soldering process and improves quality, thereby saving time and money for many manufacturers.
InTEGRATED® preforms were developed as a way to streamline the hand soldering operations for manufacturers who were placing tiny washers on connector pins with tweezers, or hand soldering through-hole components on the back side of the board with wire solder. Since their introduction, InTEGRATED® preforms have been designed for applications ranging from small and simple to large and complex.
integrated preforms
[Permanent Link to this Paper]
Posted on 1 Jul 2010
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Interconnections for SMT, BGA, and Flip Chip Technologies
by Dr. Ning-Cheng Lee
In this article, the interconnect infrastructure for SMT, BGA, and
flip chip are reviewed, with particular emphasis on the bonding technology. Interconnection technologies are the vital part of electronic packaging. Obviously, interconnections of SMT industry, from components to boards to board-level assembly methods, are the most mature and well established technology. BGA, on the other hand, intelligently utilizes the knowledge of SMT interconnections and re-engineers the design through combining the strength of various interconnect technologies and successfully comes up with a great family of versatile packages. Flip chip interconnects, while also trying to incorporate existing technology, place a good deal of emphasis on the polymeric systems, and very much develop a new arena of interconnect concepts and processes. The impact of flip chip interconnect progress is expected to ripple through the rest of electronic industries in the near future.
SMT, BGA, Flip Chip, CSP, Interconnection, surface mount, ball grid array, Packaging, assembly, soldering, pb-free, lead-free
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Ionic Cleanliness Testing Research of Printed Wiring Boards for Purposes of Process Control
by Mike Bixenman D.B.A., Steve Stach, Dr. Ning-Cheng Lee
Ionic Cleanliness testing machines are designed to determine the total ionic content extractable from the printed wiring board for purposes of process control. The conductivity of the extract solution is measured and the results are expressed as sodium chloride equivalence per unit area. The problem with this method is two fold: 1.) Many of today’s low residue flux and lead-free flux residues are not soluble in the extract solution. 2.) Contamination of concern is with site specific components, from which contamination does not correlate to the area of concern. The purpose of this study is to research low residue and lead-free flux structures, identify solvent compositions that will dissolve these residue types, and offer options for performing both bulk and site specific ionic cleanliness testing methods.
lead-free, Cleaning, flux residue, flux, soldering, solder, solder paste, SMT
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Lead-Free Flux Technology and Influence on Cleaning
by Dr. Ning-Cheng Lee
Lead-free flux technology for electronic industry is mainly driven by high soldering temperature, high alloy surface tension, miniaturization, air soldering due to low cost consideration, and environmental concern. Accordingly, the flux features desired included high thermal stability, high resistance against burn-off, high oxidation resistance, high oxygen barrier capability, low surface tension, high fluxing capacity, slow wetting, low moisture pickup, high hot viscosity, and halogen-free. For each of the feature listed above, corresponding desired chemical structures can be deduced, and the impact of those structure on flux residue cleanability can be speculated. Overall, lead-free flux technology results in a greater difficulty in cleaning. Cleaner with a better matching solvency for the residue as well as a higher cleaning temperature or agitation are needed. Alkaline and polar cleaner are often needed to deal with the larger quantity of fluxing products. Reactive cleaner is also desired to address the side reaction products such as crosslinked residue.
lead-free, flux, flux residue, solder, soldering, cleaner, Cleaning, SMT
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Lead-Free Soldering - Where The World Is Going
by Dr. Ning-Cheng Lee
Lead-free soldering for electronic industry is a segment of global trend toward lead-free environment. Although initiated in U.S. in early 1990's, it advanced much more rapidly in Japan and Europe. This differentiation in Pb-free progress triggered great concerns of users of Pb-containing solders about maintaining business opportunity, therefore further expedites the advancement of Pb-free soldering programs. The favored Pb-free solder alternatives vary from region to region. However, in general, high tin alloys are preferred, including Sn/Ag, Sn/Cu, Sn/Ag/Cu, Sn/Ag/Bi, and various versions of those alloys with small amount of additions of other elements, such as Sb. Sn/Ag/Bi systems are used in some Japanese products already. However, Sn/Ag/Cu systems are more tolerant toward Pb contamination than Bi-containing systems, therefore are more compatible with existing infrastructure for the transition stage. Pb-free surface finishes for PCBs include OSP, immersion Ag, immersion Au/electroless Ni, HASL Sn/Cu, Sn/Bi, electroless Pd/electroless Ni, electroless Pd/Cu, and Sn. The challenge for components is greater than for solder materials or PCBs. Although some Pb-free surface finishes for components exist, such as Sn, Pd/Ni, Au, Ag, Ni/Pd, Ni/Au, Ag/Pt, Ag/Pd, Pt/Pd/Ag, Ni/Au/Cu, Pd, and Ni, the performance remains to be verified. In addition, options for higher melting temperature solder is still not available for high temperature applications, including first level interconnect within the components. Thermal damage can be a concern for both PCBs and components.
pb-free, alloy, soldering, sn, Pb, solder, lead-free, lead
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Lead-Free Soldering and Low Alpha Solders for Wafer Level Interconnects
by Dr. Ning-Cheng Lee
Lead-free soldering, originally started as an environmental issue, is evolving rapidly into a business survival tool for the worldwide electronic industry. Promising lead-free solder alternatives for surface mount assembly applications include eutectic Sn/Ag, eutectic Sn/Cu, Sn95/Sb5, eutectic Sn/Bi, Sn/Ag/Cu, Sn/Ag/Cu/X, Sn/Bi/Ag/X, Sn/Zn/X, and Sn/In/Ag/(X). However, for wafer level area array solder bump interconnects, most of those options fall short in terms of fatigue resistance. Sn/In/Ag/(X) appears to be superior when compared with Sn63/Pb37, as demonstrated by Sn/In/Ag/Cu. For applications involving high lead solders, no solder alternatives have been developed yet. While the industry is advancing toward being finer, smaller, lighter, and faster, wafer level packages using area array solder interconnects is suffering from the soft error due to alpha emission from the lead in the solders. Although lead-free solder alternatives for eutectic Sn/Pb are virtually free from alpha emission, the continuous dependence on the use of high-lead solders for C4 applications indicates that the challenge of alpha emission from lead-containing solders will persist regardless of the lead-free move of the industry. This challenge is getting tougher with the rapid advancement of IC design toward further miniaturization. Low alpha lead can be obtained from cold lead ore, old lead, and laser isotope separation process, with the latter having potential as a long term solution. The price of those low alpha lead is very expensive when compared with the regular lead. Due to the increase in I/O density, requirement on alpha emission level may soon move from LC2 to LC3 level. The supply of low alpha lead for wafer level interconnects does not seem to be an issue.
lead-free, solder, soldering, wafer level interconnect, Flip Chip, CSP, BGA, alpha emission, low alpha solders, soft error, indium, pb-free
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Lead-Free Soldering of Chip-Scale Packages
by Dr. Ning-Cheng Lee
A host of
lead-free solder replacements are coming to the fore, each presenting the user with certain tradeoffs. Many of the replacement solder systems are based on adding a small quantity of a third or fourth element to binary alloy systems to lower the solder’s melting point, which increases
wetting and reliability.
lead-free, pb-free
[Permanent Link to this Paper]
Posted on 8 Mar 2010
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Lead-free: Controlling Tombstoning Behavior
by Dr. Benlih Huang, Dr. Ning-Cheng Lee
Tombstoning has plagued the surface mount assembly industry for decades. While the problem seemed under control, it has begun creeping in again due to the miniaturization of discretes such as 0402S and 0201S. This article studies tombstoning behavior on a series of SN AG CU Lead-Free Solders and attempts to find a way to control the problem.
lead-free, pb-free, tombstoning, solder, solder paste, SMT, solder alloy, pasty range, soldering, reflow
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Leaded and Lead-Free Solder Paste Evaluation Screening Procedure
by Aniket A. Bhave, Daryl Santos PhD, Dr. Ronald C. Lasky
Numerous studies have shown that greater than 60% of end of line defects in SMT assembly can be traced to
solder paste and the printing process. Reflowing adds another 15% or so. In light of this fact, it is surprising that no simplified procedure for solder paste evaluation has been documented. This paper is about such a procedure.
pb-free, lead-free, stencil printing, solder paste, solder paste evaluation
[Permanent Link to this Paper]
Posted on 31 Mar 2010
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Low-Melting Metallic Sputtering Targets Bonded At Room Temperature (Ambient)
by Thomas Acchione, Jim Hisert
Solar PV cell and module manufacturers are looking for new and improved assembly materials and process enhancements to increase throughput, reduce cost, and improve cell efficiency. To reach these (dynamic) higher goals for thin film deposition, new materials and cost-effective processes are needed. Depositing the target material directly onto the backing plate is typically used when conventional target bonding is simply not possible because of the low-melting point range of materials. When using the low melting alloys or single elements in thin film cells (CIG, CuGa, In, and InSn), it is possible to use a localized heat source to bond them at room temperature. This paper discusses:
1) the casting of these low-melting alloy sputtering targets, and
2) the subsequent bonding of the alloys to a backing plate for use in existing equipment.
In addition, the presentation will demonstrate the bonding of low-melting point metallic sputtering targets, as well as how to verify the performance of these targets during operation.
solar, sputtering target, NanoFoil
[Permanent Link to this Paper]
Posted on 21 Jan 2011
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Metal Alloys for Thermal Interfacing
by Jim Hisert
Shrinking semiconductor package sizes, growing power handling and switching speeds are driving advances in electronic device cooling methods. Thermal conduction – the rate at which heat can be transferred away from these components – is key, but conventional
Thermal Interface Materials (TIMs), at the limit of their capabilities, are becoming a bottleneck in the heat distribution pathway.
[Permanent Link to this Paper]
Posted on 8 Mar 2010
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Metal Thermal Interface Materials in Power Devices
by Bob Jarrett, Jordan Ross
As today’s technology devices continue to get smaller and more powerful, the need for high performance thermal interface materials is becoming more critical. Metal thermal interface materials are the ideal solution to fill this need. The high thermal conductivity of metals and alloys determines how they can be used in thermal solutions. Metals dominate heat sink, spreader, and heat pipe applications due to their high conductivity, as well as their ease and flexibility in fabrication. In critical heat flow situations, metals are frequently used as the thermal interface material (TIM) in the thermal solution.
TIM
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Posted on 8 Mar 2010
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Metrology in Wafer-Level Microsphere Processes
by Paul Flynn, Jeff Schake, Jim Hisert
The wafer-level microsphere process is an accessible system of bumping a wafer with solder, which focuses on achieving high output at a low cost. This process begins with a wafer that has undergone front and back end-of-line procedures and is ready to accept solder as means of later interconnection. Flux is printed on the wafer UBMs (under bump metallizations) in a standard wafer paste type printing operation. This operation employs either a mesh screen or stencil to align flux deposits directly over the UBM. It is very common to use solder to act as an interconnect, while the UBM provides an attachment point for the solder, as well as a barrier to unwanted diffusion. The UBM also controls intermetallic formation. One common under bump metallization stack is titanium/nickel/gold. Each material has a purpose. In this example, titanium is used as an adhesion layer, nickel limits diffusion, and gold passivates the nickel to limit oxidation. After the flux is deposited, spheres of the correct size (typically 60 – 300um) are placed into the flux deposits and sent through reflow. The temperature for wafer reflow depends on the alloy, which is selected for the application. Tin/silver/copper alloys are very popular, although many people still use tin/lead and other low melting point alloys. The main consideration for choosing a certain alloy is often driven by processing restrictions during packaging or assembly. Sometimes a particular alloy is needed to endure life cycle testing or in-use conditions. Other lower temperature alloys are, at times, needed to allow the joining of die, which can not endure standard processing temperatures. The resulting solder formations should be spherical, with minimal height variations and maximum metallurgical attachment to the UBM. The flux can then be cleaned from the wafer surface if desired.
flux, spin coating
[Permanent Link to this Paper]
Posted on 15 Oct 2009
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Minimizing Voiding in QFN Packages Using Solder Preforms
by Seth Homer, Dr. Ronald C. Lasky
According to Prismark Partners, the use of quad-flat no-leads (QFNs) is growing faster than any package type except for flip-chip CSPs. Prismark projects that by 2013, 32.6 billion QFNs will be assembled worldwide, which represents 15% of all IC packages.
However, QFNs can be a challenge to assemble, especially when it comes to voiding. In most QFN assembly processes, solder paste is used as a means of attachment. This approach can be problematic, as excessive voiding often occurs due to the lack of standoff on the component and the high flux content of the paste. The addition of a solder preform can reduce such voiding by increasing the solder volume of the joint without adding flux volume.
Adding preforms to an assembly process is very easy. Preforms are packaged in tape & reel for easy placement by standard pick and place machines, right next to your components. The focus of this paper will quantify the preform requirements and process adjustments needed to use preforms in a standard SMT process. In addition, experimental data showing void reduction using preforms will also be presented.
Apex 2012, solder preforms, flux, QFN packages
[Permanent Link to this Paper]
Posted on 14 Oct 2011
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NanoBond® Assembly - A Rapid, Room Temperature Soldering Process
by Jacques Matteau
Indium Corporation has commercialized a new technology with NanoFoil® that will revolutionize how manufacturers join components using solder materials (see Figure 1). The joining process is based on the use of reactive multilayer foils as local heat sources. The foils are a new class of nano- engineered materials in which self-propagating exothermic reactions can be ignited at room temperature through an ignition process. By inserting a multilayer foil between two solder layers and two components, heat generated by the reaction in the foil melts the solder and, consequently, bonds are completed at room temperature in air, argon, or vacuum in approximately one second. The resulting metallic joints exhibit thermal conductivities two orders of magnitude higher, and thermal resistivity an order of magnitude lower than current commercial Thermal Interface Materials (TIMs).
The use of reactive foils as a local heat source eliminates the need for torches, furnaces or lasers, speeds the soldering processes and dramatically reduces the total heat that is needed. Thus, temperature-sensitive or small components can be joined without thermal damage or excessive heating. In addition, mismatches in thermal contraction on cooling can be avoided because
components see very small increases in temperature. This is particularly beneficial for joining metals to ceramics. The fabrication and characterization of the reactive foils is described and the value proposition for NanoBonding is presented. This paper also shows the applicability of this platform technology to many areas of packaging, including TIMs, microelectronics, optoelectronics and Light Emitting Diodes (LEDs).
Thermal transfer, TIM, NanoFoil, NanoBond, solder bonding
[Permanent Link to this Paper]
Posted on 14 Nov 2011
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NC-SMQ®92J Case Study
by ICA
A Contract Equipment Manufacturer conducted an
independent “live”production line test of two solder
pastes and confirmed the age-old adage “You get what
you pay for.”Today’s electronics industry derives its
strength from global marketplace competitive pricing
but beyond price is the overall impact of quality and
production achieved by using technologically superior
products — even if they cost a little more.Solder paste,
an often-undervalued component necessary for elec-
tronics manufacturing,generated significant savings by
achieving higher yields, reducing solder paste scrap,
and eliminating nitrogen processing costs.
halogen-free solder paste, halide-free solder paste, halogen-free, halide-free, head, pillow, head-in-pillow, head in pillow defect, NC-SMQ92J
[Permanent Link to this Paper]
Posted on 8 Mar 2010
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Next Generation PoP Pastes for Electronics Assembly
by Jim Hisert, Brandon Judd
Package-on-package (PoP) technology allows two or more electronic components to be stacked vertically, which saves space and allows our portable gadgets to continue getting smaller year after year. A relatively new form of solder paste called "PoP Paste" has been developed specifically for this application.
There are fundamental differences between PoP pastes and the traditional solder pastes, which are designed for printing applications. This paper will highlight the differences between these solder pastes and talk about the characteristics needed by PoP pastes to increase transfer efficiency, eliminate head-in-pillow defects, and provide excellent solder wetting. If these three criteria are met, solder joint reliability will follow.
head-in-pillow, Dipping Flux, Dipping Paste, package on package, PoP Solder Paste, BGA
[Permanent Link to this Paper]
Posted on 15 Oct 2009
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Next Level Requirements for Ultra Fine Pitch Printing
by Marty Carr, John Carr, Richard Brooks
New assembly technologies are being considered for production to reduce size and/or increase functionality. These new technologies include: 0201 & 01005 chip components and 0.4 mm & 0.3 mm pitch CSP devices. In order to implement these new technologies, some major changes in the manufacturing process may have to be addressed. First, the solder paste must provide the ability to print very small apertures, such as 0.008" (0.2mm) & below and with consistent paste release from the stencil. Therefore, one of the possible solutions may be to change the standard solder powder size, which is type 3 powder. Also, because we are printing very small aperture openings, we need to consider changes in the stencil technology. Some of those changes are the stencil type (laser versus electroformed) and the stencil thickness. Additionally, because we are attempting to print very small apertures, the printing process must be in control and characterized. This paper will review the new technology requirements and how they will affect the performance of the solder paste and stencil technology in the manufacturing process, as well as the printing process.
fine pitch printing, stencil technology, stencil design, pad design, solder powder, process characterization, solder paste
[Permanent Link to this Paper]
Posted on 8 Mar 2010
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No-Clean Flux Residue and Underfill Compatibility Effects on Electrical Reliability
by Eric Bastow
No-clean soldering processes dominate the commercial electronics manufacturing world. With the explosion of growth in handheld electronics devices, manufacturers have been forced to look for ways to reinforce their assemblies against the inevitable bumps and drops that their products experience in the field. One method of reinforcement has been the utilization of underfills to “glue” certain surface mount devices (SMDs) to the PCB. This provides additional mechanical strength over and above the soldered connections. Bumped SMDs attached to the PCB with a no-clean soldering process offer the unavoidable scenario of the underfill coming in contact with a flux residue. This may or may not create a reliability issue. No-clean solder paste flux chemistries can vary. Some have halogens and others do not. Some have standard residues and others have residues optimized for pin probing. There are also a number of underfill chemistries on the market. Furthermore, underfill curing conditions vary depending on whether the SMDs are exposed on the surface of the PCB or underneath an RF shield. This paper will discuss an experiment designed to measure the electrical reliability of various combinations of underfill and no-clean flux residues, as measured with J-STD-004B SIR (IPC-TM-650 2.6.3.7).
Apex 2012, solder paste, no-clean flux, flux residue
[Permanent Link to this Paper]
Posted on 1 Mar 2012
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No-Clean Soldering Process
by Dr. Ning-Cheng Lee
No-clean soldering process is the cheapest available process alternatives in the post-CFC era. In order to enjoy the benefit of no-clean process, care should be taken to assure the cleanliness of products before and after assembly. In addition, the no- clean soldering materials have to be properly formulated in order to deliver the high reliability and adequate flux residue appearance. Due to the elimination of cleaning process, issues such as solder beading, solder balling, probe testability, wire bondability, compatibility with polymeric coatings or wave soldering fluxes have to be addressed. No-clean fluxes typically utilize hydrophobic chemicals and often are in line with RMA flux chemistries. Nitrogen is required if a low residue level is desired for reflow process. Some conventional testing methods may not be adequate for evaluating no-clean soldering materials. Concurrent trends of shifting toward finer pitch, higher reliability, lower residue, and air reflow processes pose a great challenge for no-clean soldering process.
lead-free, pb-free, paste, flux, soldering, solder, no-clean
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Nothing solders like solder ... or does it?
by Amanda Gronau
The move to
lead-free electronics has had a slow start and many detractors, for a variety of reasons that range from the rational - added costs, new process parameters, extensive testing and approval, the need for consensus within the industry, to the irrational - fear of the unknown. The transition will not be easy, but given the market demand for environmentally friendly electronics, it seems inevitable.
pb-free, lead-free
[Permanent Link to this Paper]
Posted on 8 Mar 2010
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Novel Approaches to Benchmarking Solar Cell Tabbing Solderability
by Rick Lathrop, Karl Pfluke
For crystalline silicon solar cell front contact metallizations, silver thick film formulations are ubiquitous. For backside contact pads, either silver or silver/ aluminum formulations are common. The trend for back contact metallizations is towards low lay down formulations, resulting in thin fired films. Although there are many different reflow methods used to “string” cells together, the need for fast wetting, leach resistant and well adhered front and rear contact metallizations are common to all methods. In order to accurately predict a material's compatibility with the module assembly process, quantitative tests needed to be developed due to an absence of industry standard tests. Classic thick film solder pot leaching and wire peel adhesion tests do not emulate the solar module assembly process well. Although more similar in process, SMT solderability tests also lack close correlation. To fill this gap, several solderability tests specifically designed for module assembly and cell metallizations have been developed and will be discussed in detail. These tests are, in fact, a hybrid of SMT and thick film tests but tailored, for the solar module assembly process. Wetting assessment is accomplished by measuring the reflowed area and height of a precise volume of solder using a confocal measuring system. For ribbon adhesion, manual and automated methods are compared, as well as various peel angles. From these studies, a ribbon attach method and adhesion test emerges suitable for benchmarking contact metallization formulations. Recommendations on how to recognize and prevent silver leaching are also discussed.
tabbing ribbon, metallization, silver leaching, adhesion, wetting
[Permanent Link to this Paper]
Posted on 20 Oct 2011
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Optimizing Reflow Profile Via Defect Mechanisms Analysis
by Dr. Ning-Cheng Lee
The reflow profile is engineered to optimize the soldering performance based on defect mechanisms analysis. In general, a slow ramp-up rate is desired in order to minimize hot slump, bridging, tombstoning, skewing, wicking, opens, solder beading, solder balling, and components cracking. A minimized soaking zone reduces voiding, poor wetting, solder balling, and opens. Use of low peak temperature lessens charring, delamination, intermetallics, leaching, dewetting, and voiding. A rapid cooling rate helps reducing intermetallics, charring, leaching, dewetting, and grain size. However, a slow cooling rate reduces solder or pad detachment. The optimized profile favors that the temperature ramps up slowly until reaching about 180°C. The temperature is then gradually raised further up to 186°C within about 30 seconds, then raised rapidly until reaching about 220°C. After that, the temperature is brought down with a rapid cooling rate. The conventional profile was developed due to the limitation of past reflow technologies. Implementation of the optimized profile requires the support of a heating-efficient reflow technology with a controllable heating rate. Vapor phase reflow can provide a rapid heating, but has difficulty to control the heating rate. Infrared reflow can regulate the heating rate, but is sensitive to variation in parts features. Emergence of the forced air convection reflow provides controllable heating rate. In addition, it is not sensitive to variation in parts
features, thus allows the realization of the optimized profile.
lead-free, pb-free, SMT, vapor phase, infrared, convection, soldering, solder paste, flux, defect, profile, reflow
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Optimizing Your Stencil Printing Process
by Brandon Judd
As a technical support engineer for a solder paste supplier, I often travel to customers’ facilities in order to troubleshoot a process issue on an SMT line. Although there are several issues that may arise regarding the placement and reflow portion of production, the product may be doomed from the very beginning if the stencil printing process is not optimized. There are several variables involved in the stencil printer setup.
[Permanent Link to this Paper]
Posted on 9 Mar 2010
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Options and Concerns of BGA Solder Bumping
by Dr. Chingchen S. Chiu, Dr. Ning-Cheng Lee
The solder bumping process for BGA is investigated by using solder paste alone, solder spheres with solder paste, and solder spheres with fluxes. Also explored is the use of InTEGRATED® preforms together with either flux or solder paste. For bumping process involving Sn62 or Sn63 spheres, use of paste for sphere attachment produces excellent alignment results. In the case of using fluxes for Sn62 or Sn63 sphere attachment, the defect rate increases with decreasing flux viscosity, decreasing solvent volatility, decreasing pitch dimension, increasing flux deposition thickness, increasing flux activity, and increasing pad diameter. For overall better yield, a solder paste with long stencil life, good printability, and good solder ball performance should be the most promising eutectic sphere attachment material. For systems using pastes for Sn10 sphere attachment, no missing is observed, and the alignment improves with decreasing paste deposition thickness, decreasing solvent volatility, increasing sphere solderability, increasing flux activity, increasing pad dimension, increasing metal load, increasing pad solderability. Paste viscosity, pitch, and reflow profile has negligible effect on the Sn10 bumping yield using Sn63 solder paste. An easily releasable solder paste is crucial for area-array BGA if a regular print-release process is desired for bumping with solder paste alone. Bumping with InTEGRATED® preforms is promising. Reducing the thickness and width of the solder link is considered essential for improving the bumping success rate. Other potential bumping processes may include (1) dispense paste/reflow, (2) print paste/reflow/release, (3) apply solder mask/print paste/release /reflow/strip solder mask, (4) solder jet/reflow, and (5) sphere welding, and are briefly introduced and commented on.
lead-free, balling, bump, Bumping, BGA, solder sphere, solder paste, integrated preforms, flux, defect rate, pb-free, solder
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Overview of Lead-Free Solders
by Jeff D. Sigelko, K.N. Subramanian
Pending legislation and global marketing pressures driven by environmental concerns, along with the need for solders with higher temperature capability for severe service environments, have resulted in significant activities to find substitutes for lead-bearing solders for microelectronics.
solder, lead-free
[Permanent Link to this Paper]
Posted on 9 Mar 2010
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Photovoltaic Module Assembly Using SMT Assembly Materials and Processes
by Karl Pfluke
EMS providers specializing in SMT are seeking to diversify and fill capacity. Photovoltaic module assembly is a popular choice. PV cell stringing in solar module assembly is achieved using many common SMT materials and processes. Solders, fluxes, and reflow technologies produce electrical interconnects in a-Si and c-Si photovoltaic assembly technology.
flux, bus ribbon, solar, tabbing ribbon, CIG, Copper Indium Gallium, photovoltaic
[Permanent Link to this Paper]
Posted on 1 Jul 2009
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Probe Testability of No-Clean Solder Pastes
by Dr. Ning-Cheng Lee, Paul A. Jaeger, Manchao Xiao
The probe-testability of no-clean solder paste flux residue at in-circuit-test is determined mainly by the residue amount, residue location, and residue hardness. The testability increases with decreasing amount of residue, decreasing amount of top-side flux spread, and increasing amount of bottom-side flux spread. The residue amount, top-side flux spread, and bottom-side flux spread affect primarily pad probing, pad probing, and pin-tip probing, respectively. Inert reflow atmosphere helps probe penetration. Higher metal load effectively reduces the flux spreading. Among all, the soft residue approach appears to be most promising in providing successful probe contact.
lead-free, pb-free, no-clean, flux residue, solder paste, testability, probe
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Process and Reliability Advantages of AuSn Eutectic Die-Attach
by Steve Buerki, Amanda Hartnett
High-power semiconductor devices must be mounted using a robust die-attach material that can handle the temperature fluctuations generated by the chip and mechanical stresses due to CTE mismatches between the die material and the substrate it is mounted to. Traditionally, various die-attach products, such as metal-filled conductive epoxies, high lead-containing solders, and gold-silicon solders, have been sufficient to mount the chip and have it perform reliably for the life of the device it operates. However, the trend toward increasing heat generation, the demand for compact devices, the enactment of RoHS and REACH legislation, and the transition to GaAs chips, limit the use of conventional materials. The demand for high reliability in power devices, in light of these industry trends, has led engineers to evaluate various new materials for their die-attachment.
The use of a high temperature solder preform is proposed and demonstrated for use as a die-attach material in high power devices. The suggested solder preforms are eutectic gold-tin and may be implemented for high volume or lab quantity adoption using a Palomar Technologies’ die bonder. This equipment is capable of handling the complete die-attach process, including high-accuracy pick-and-place of substrates, eutectic gold-tin preforms, and components; eutectic die-attach; and pulsed-heat reflow using a computer controlled Pulse Heat Stage (PHS). Each of these steps is precisely controlled to offer a near void-free eutectic die-attach between the device and its substrate. This is critical for thermal and electrical stability in high power applications. When the substrates, preforms, and components are supplied in high volume packaging, the assembly line can be fully automated, which enables a reduction in the cost of ownership and improves process yields.
Assembly applications suited for this process include, but are not limited to, high-brightness LEDs, power amplifiers, LASER diodes, VCSELS, lid attach, MEMS, RF packages, IGBT modules and wafer scale packaging.
wafer scale packaging, pb-free, eutectic die-attach, automated pick-and-place, solder preforms, die bonder, AuSn solder
[Permanent Link to this Paper]
Posted on 5 Nov 2009
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Process Optimization to Prevent the Graping Effect
by Dr. Ronald C. Lasky, Ed Briggs
The explosive growth of personal electronic devices, such as mobile phones and personal music devices, has driven the need for smaller and smaller active and passive electrical components. Not too long ago, 0401 (40 x 10 mils) passives were seen as the ultimate in miniaturization, yet the introduction of 0201s and, most recently, 01005 passives have occurred. For active components, area array packages with 0.4mm lead spacing have become virtually a requirement for enabling the many features in modern portable electronic devices, with 0.3mm packages already on the way.
This miniaturization trend, occurring at the same time as the conversion to RoHS compliant lead-free assembly, has put a considerable strain on the electronic assembly industry. This paper will discuss the specific challenge of the graping effect and the work that has been performed to mitigate this phenomenon. Discussed are the effects of the solder paste material attributes, consistent stencil printing of the small solder paste deposits required, and minimizing oxidation of the small solder paste deposit during reflow. All of these steps are necessary to assure a good finished solder joint.
solder paste, graping, oxidation, stencil printing
[Permanent Link to this Paper]
Posted on 21 Jan 2011
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Prospect of Lead Free Alternatives for Reflow Soldering
by Dr. Ning-Cheng Lee, Dr. Benlih Huang
The prospects of 10 major lead-free solder alloys for being widely used for reflow soldering are studied in this work. Compatibility of those alloys with a variety of representative flux chemistries is considered essential, and is determined for performance in handling- ability, including shelf life and tack time, and soldering capability, including solder balling, wetting, and solder joint appearance. Results indicate that the control 63Sn37Pb is still the most compatible alloy, rated 27.1 in compatibility out of a full scale 30 when using warm profile. The primary factor which distinguishes 63Sn37Pb from the rest alloys is the soldering performance, particularly the wetting and solder appearance. As to the solder balling, although 63Sn37Pb is also the best, it is fairly close to the best lead-free systems. Among the lead-free options, both SnAgBi alloys studied here, 91.7Sn3.5Ag4.8Bi and 90.5Sn7.5Bi2Ag, turn out to be on the top of lead-free systems, rated 22.9 and 22.8, respectively. This is mainly attributed to the better wetting and solder balling performance. Shelf life and tack time of the SnAgBi systems are also fairly good, while the solder appearance is at best considered average. The six alloys, 99.3Sn0.7Cu, 95.5Sn3.8Ag0.7Cu, 93.6Sn4.7Ag1.7Cu, 96.2Sn2.5Ag0.8Cu0.5Sb, 58Bi42Sn, and 95Sn5Sb, show fairly comparable performance to each other, with compatibility ranging from 19.3 to 20.3. In general, the whole group displays a quite noticeably poorer wetting than SnAgBi systems. 58Bi42Sn exhibits a fairly poor solder balling performance, but an outstanding solder appearance among lead-free systems. 96.2Sn2.5Ag0.8Cu0.5Sb shows a relatively poor performance in both wetting and solder appearance among these six alloys. 96.5Sn3.5Ag, rated 17.1 in compatibility, is ranked below the other alloys described above, mainly due to poor performance in solder balling, and particularly the poor wetting. 89Sn8Zn3Bi, rated only 2.2 in compatibility, falls far short in every category when compared with all other alloy systems. Obviously, this is attributable to the very reactive nature of zinc, which results in excessive oxidation of metal and excessive reaction with fluxes, and consequently a definitely unacceptable performance for solder paste applications. High-tin-content lead-free alloys seem to display a thicker IMC layer than eutectic SnPb when reflowed.
pb-free, tack time, shelf life, solder appearance, solder balling, wetting, flux, paste, reflow, soldering, solder, lead-free
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Prospects of Solder Paste in Ultra Fine Pitch Era
by Dr. Manchao Xiao, Kevin J. Lawless, Dr. Ning-Cheng Lee
The 12 mil pitch processing is achievable with solder paste. It may also be the limit of solder paste printing technology, mainly due to the scooping problem associated with thin stencils. With decreasing pitch size, both smear and insufficiency rate increase. Tapering of stencil aperture helps thick stencil prints, but hurts on thin stencil printing. Aperture with orientation parallel to squeegee movement results in a higher print defect rate. Overall, use of fine powders is the most effective means to meet most challenges. It helps on achieving high performance in printability, tack, and non-slump, with acceptable trade-off in rheology and tack time. Solder balling may be the primary hurdle. The problem may be resolved by using inert reflow atmosphere or via flux chemistry improvements. A metal load of 90.5 to 91% seems to be the optimum for most properties.
lead-free, pb-free, solder balling, slump, print, Fine Pitch, solder paste
[Permanent Link to this Paper]
Posted on 9 Mar 2010
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Reflow Soldering: Meeting the SMT Challenge
by Dr. Ning-Cheng Lee
Reflow soldering of solder paste is the primary interconnection method used in SMT assembly process. The major issues which plague the reflow soldering performance include, but not limited to, bottom-side-component-holding, bridging, dewetting, low-residue, opening, solder balling, solder beading, solder-fillet-lifting, tombstoning, defective balling for BGA, and voiding. The mechanisms, causes, and cures for each issue are briefly discussed in this article.
lead-free, soldering, solder paste, SMT, bridging, dewetting, opening, solder balling, solder beading, solder-fillet-lifting, tombstoning, balling for BGA, voiding, pb-free, reflow
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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RoHS Recast
by Dr. Ronald C. Lasky, Krista Botsford
Even today, its is not widely understood that the fundamental reason that the European Union's Restriction of Hazardous Substances (RoHS) law was put into effect was to support its sister recycling Waste of Electronic and Electrical Equipment (WEEE) law. It is simply much safer, easier and cheaper to recycle electronics equipment that contains little toxic materials. The bill for the industry to convert to RoHS compliant assembly has been estimated at over USD $40 billion, a figure we think is low. RoHS has had the unintended benefit of making uncontrolled recycling of electronic waste in third world countries much safer for workers and environment. National Geographic published an excellent article on this need.
RoHS, electronic
[Permanent Link to this Paper]
Posted on 9 Mar 2010
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RoHS: Five Years Later
by Dr. Ronald C. Lasky
Are electronics any “greener” than before RoHS? It is a fair question to ask. With the advent of RoHS on July 1, 2006, and more recently REACH, one might be inclined to answer that it is greener than it was. We will take a look at this question in several different ways, to discover the actual positive and negative effects of RoHS in both first world and developing countries.
RoHS, lead-free, pb-free, electronics recycling
[Permanent Link to this Paper]
Posted on 14 Nov 2011
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Room Temperature LED and D-Pak Type Component-Attach and Reliability Testing
by Mario Scalzo, Thomas Acchione
Engineers working with LED and D-pak type component-attach are looking for improved assembly materials and process enhancements to increase throughput, reduce cost, and improve product efficiency and reliability. Many of these packages are susceptible to higher voiding on the ground plate-attach during reflow. A room temperature process would lower voiding, reduce the failure rate, and increase the lifetime of the component.
Technology developments have proven that it is possible to use a localized heat source to bond components at room temperature. This paper discusses the bonding of LED and D-pak components at room temperature. It also talks about the quality and long term reliability of the components. The presentation will demonstrate the component bonding process both manually and through the use of automation, and show attendees how to verify the performance of the components post bonding.
NanoFoil, NanoBond, LED, CTE mismatch, room temperature bonding
[Permanent Link to this Paper]
Posted on 24 Jan 2011
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Sealing the Gap of Solder Paste Technology in Lead-Free Halogen-Free Era
by Dr. Ning-Cheng Lee, Dr. Arnab Dasgupta, Dr. Runsheng Mao, Dr. Yan Liu
Electronic industry has been driven toward lead-free by RoHS (Restriction of Hazardous Substances Directive) which is in force since 2006. Recently REACH (Registration, Evaluation and Authorization of Chemicals) further drives the industry toward halogen-free. As a result, solder pastes for PCB assembly are required or desired to be both lead-free and halogen-free. Lead-free solder alloys in general wet poorer than tin-lead due to the higher surface tension of the former alloys. In the mean time, halogen-free fluxes typically also wet poorer than the more powerful halogen-containing fluxes. Consequently, the lead-free and halogen-free solder paste products that emerged inevitably suffer from a considerably inferior soldering performance than that of conventional halogen-containing tin-lead solder pastes. The deficiencies include poor wetting, solder balling, voiding, graping, head-in-pillow, etc. This gap is particularly significant for fine-pitch applications where the impact of oxidation is more profound. Furthermore, the higher soldering temperature of the higher melting lead-free alloys also aggravates the challenge of in-circuit test for no- clean processes, mainly due to the difficulty for probe to penetrate through the toughened flux residue. Although use of inert reflow atmosphere may alleviate some of the problems, the higher cost of it is prohibitive for most of the manufacturing firms. In this work, a halogen-free lead-free no-clean solder paste system, Indium8.9HF series, has been developed. It exhibits superior oxidation tolerance, thus assures superior resistance against graping, head-in-pillow, solder balling, voiding, and poor wetting for miniaturized electronic applications. In spite of the immense challenge in material science, this system also shows outstanding probe testability, in addition to its very good printability, non- slump, SIR, and ECM performance. The superior performance of this Indium8.9HF system effectively sealed the gap caused by lead-free and halogen-free requirements.
lead-free, halogen-free, no-clean, solder, solder paste, miniaturization, graping, head-in-pillow, voiding, solder balling, probe testability, ICT, oxidation
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Selection of Dip Transfer Fluxes and Solder Pastes for PoP Assembly
by Dr. Yan Liu, Pamela Fiacco, Derrick Herron, Dr. Ning-Cheng Lee
Consideration and selection of dip transfer fluxes and solder pastes for PoP assembly are described, based on process considerations. The crucial properties vital for successful dip transfer include homogeneity, open time on the flux/paste bed, volume and consistency of the dip transferred material, open time after the dip transfer before reflow, and solder joint formation. For each property, one or more practical, recommended test methods are described. Overall, this work should provide the assembly house with an easy way to select a flux or solder paste adequate for dip transfer of PoP assembly applications.
PoP, package-on-package, flux, solder paste, dip transfer, soldering, SMT
[Permanent Link to this Paper]
Posted on 24 Jan 2011
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Shock Reliability of BGAs Assembled With Capillary and No-Flow Underfill
by Jim Hisert
It is commonly known that Sn/Ag/Cu ball-grid array packages (BGA) are more brittle than Sn/Pb BGAs at
high stress levels such as those induced during drop testing. ¹ This problem is sometimes remedied by
reinforcing the solder joints with underfill. Even Sn/Pb area array packages are not always sufficiently
secure if attached without underfill.
Underfills have been designed to fortify both Sn/Pb and Pb-Free packages. Currently, the electronics
industry can choose from a few different underfill processes. Two of the most popular are the capillary
underfill (CUF) and no-flow underfill (NFUF) processes. In a drop-test, designed to mimic the realistic
abuse of portable electronics, packages assembled via each process were tested.
[Permanent Link to this Paper]
Posted on 9 Mar 2010
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Simple Testing to Evaluate Ball Attach Fluxes
by Jim Hisert, Sigurd R. Wathne PE
The best way to test a flux is to conduct the test in the production line under actual working conditions. This can be impractical if too many materials are included in the evaluation process. There are, however, ways to understand the capabilities of a wide range of flux materials without scrapping a large amount of production parts and time. This article will outline a test procedure that can be used to initially compare fluxes with minimal time, capital expense, and equipment. The key data is the quality of a flux to promote wetting of various alloys on a variety of surface finishes. [1] This will be calculated as a change in solder diameter after reflow. Although solder spread is the numerical outcome of the testing, cleanability of water-soluble fluxes and post reflow residue of no-clean fluxes may become apparent to the technician involved in this testing. It is a good way to get a feel for a material set in a very short time.
Solder Melting, Solder Basics, solder alloy, solder, pb-free, Flux Cleaning, flux, BGA, ball attach
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Six Sigma® Techniques for Solder Paste Selection
by Wang Ming, Aniket A. Bhave, Dr. Daryl Santos, Dr. Ronald C. Lasky, Sniket A. Bhave
Numerous studies have shown that greater than 60% of end of line defects in SMT assembly can be traced to
solder paste and the printing process. Reflowing adds another 15% or so. In light of this fact, it is surprising that no simplified procedure for solder paste evaluation has been documented. This paper is about such a procedure.
By using designed experiments and the measurement of critical solder paste related process metrics, we were able to develop a solder paste evaluation procedure that maximizes information about the solder paste and its processability while minimizing experimentation. While using only 12 stencil printed PWBs, we were able to generate statistically significant results that enabled us to rank solder pastes according to their performance. Response metrics that were investigated were print volume and definition before and after pause, squeegee hang up, slump, tack, release from aperture, and solder joint quality.
In addition, we found such variation in solder paste volume repeatability that this criterion alone can be used as a screening procedure.
lead-free, pb-free, solder paste evaluation, solder paste, stencil printing
[Permanent Link to this Paper]
Posted on 9 Mar 2010
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Solder Beading in SMT-Cause and Cure
by Dr. Ning-Cheng Lee, Paul A. Jaeger, Wanda B. Hance
Solder beading is a special phenomenon of solder balling when using solder paste in certain SMT applications. In brief, solder beads are large solder balls near components with very low stand-off (see scheme below). With more attention being drawn to no-clean paste applications due to CFC concerns, a better understanding of this event becomes indispensable. In this study, the data indicate solder beading was caused by flux outgassing which overrode the paste cohesive force during the preheat stage. The outgassing promoted the formation of isolated paste aggregates underneath the low clearance components. At reflow, the isolated paste melted and , once emerged from the underside of the components, coalesced into solder beads. Processingwise, this problem can be remedied by slowing down outgassing via a milder preheat profile, or by reducing print thickness. Materialwise, solder beading can be corrected by enhancing the paste cohesive force via cold welding of solder powders during the preheat stage. This in-turn can be accomplished through the use of lower activation temperature flux, coarser solder powder, higher metal load, and solder powders with lower oxide content. Other parameters which could affect the performance will also be discussed.
lead-free, pb-free, solder balling, SMT, flux, solder paste, beading, solder beading
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Solder Bumping Via Paste Reflow For Area Array Packages
by Dr. Benlih Huang, Dr. Ning-Cheng Lee
Several unique solder paste systems have been developed and tested for 63Sn/37Pb solder bumping for wafer, CSP, and BGA with the low cost print-detach-reflow process. The results indicate that the bump height achieved is very adequate and consistent for all three area array package systems. Microstructure of solder bumps appears normal. The yield is also very high for both before reflow and after reflow condition, and is dictated by printing performance. With the unique high slump resistance exhibited by those newly developed pastes, the paste transfer efficiency at printing stage becomes the most critical performance for this process. The transfer efficiency increases with increasing area ratio, increasing taper angle, decreasing pitch, decreasing stencil thickness, decreasing challenge, with adoption of square aperture design, and is not sensitive to aspect ratio of aperture to solder particle size. The paste systems appear to have more potential for depositing a larger amount of paste per unit pitch, as evidenced by the linear relation between expected paste volume and the deposited paste volume. Increasing metal content helps improving bumping performance. The bottleneck of increasing bumping performance for wafer applications appears to be developing a stencil manufacturing technology capable of providing an aperture pattern with spacing considerably smaller than the stencil thickness. Slow print speed is also essential for adequate printing. A non-shiny non-smooth stencil surface is considered beneficial for aiding paste rolling. The flux residue of those pastes is cleanable with solvents.
solder, soldering, area array package, Flip Chip, BGA, CSP, sphere, Bumping, paste, flux, fluxless, pb-free, lead-free
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Solder Paste Dipping with 0.4mm Pitch PoP Packages
by Chris Nash, Maria Durham
The electronics industry trend toward miniaturization of electronic assemblies has created the necessity for smaller pitch and bumps on chip-scale-packages (CSP) and package-on-package (PoP) components. Smaller pitch and bumped packages have led to the need for novel solder paste material characteristics. The flux vehicle rheology, powder size, and metal load all play a crucial role in the solder material’s dipping and reflow performance. It is equally important to understand the role of the actual dipping and reflow processes with regard to performance of the material.
flux, dipping and reflow process, package-on-package, chip-scale packages, solder paste, electronics assembly
[Permanent Link to this Paper]
Posted on 22 May 2012
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Solder Paste Evaluation Techniques to Simplify the Transition to Pb-Free
by Timothy Jensen
As the July 1, 2006 Pb-free deadline approaches, many electronics assemblers are beginning to fathom the changes and process demands required. The two biggest material concerns involve solder paste and components. This document provides practical recommendations for evaluating Pb-free solder pastes and ensuring that the selected solder paste will deliver assembly yields comparable to, or better than, the incumbent Sn/Pb solder paste.
lead-free, pb-free, stencil printing, reflow, response to pause, evaluation, solder paste
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Solder Paste Technology
by Liyakathali Koorithodi
Solder paste is a vital material for the modern electronics industry as it enables surface mount assembly. Without solder paste, modern electronics would not exist. The performance of the solder paste directly affects the stencil printing and reflow soldering processes, and contributes directly to the manufacturing yields and reliability. The development and manufacture of solder paste is multidisciplinary and encompasses metallurgy, physics, chemistry, rheology and other fields.
[Permanent Link to this Paper]
Posted on 9 Mar 2010
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Solder Paste: Meeting The SMT Challenge
by Dr. Ning-Cheng Lee, Gregory Evans
This paper focuses on many of the problems facing process engineers today. The experiments used in this study were designed to find the true causes of the problems and headaches which plague SMT assembly today. Data indicate that wicking is caused by a relative hotter component and is aggravated by non-coplanarity. It can be reduced by slower heating rate or more bottom-side heating. Bridging is caused by slumping, and is aggravated by smaller pitch dimension and slower flux wetting speed. Tombstoning is a result of uneven heating. It can be reduced by optimizing pads spacing and by using fluxes with slower wetting speed, or by a smaller print thickness. Problems such as slumping, clogging, solder balls, and white residue are also discussed.
lead-free, pb-free, white residue, solder balling, tombstoning, bridging, wicking, clogging, slumping, SMT, solder paste
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Solder Preform Basics (Chinese)
by Paul Socha
A chinese version of Solder Preform Basics.
CHINESE LANGUAGE
[Permanent Link to this Paper]
Posted on 22 Mar 2010
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Solder Preform Basics (English)
by Paul Socha
Paul A. Socha, Indium Corporation, reviews the types of solder preforms and their uses. He offers 10 basic steps to determining if an assembly needs preforms. Solder preforms can be used on a mixed SMT and through-hole PCB or to fortify solder paste on a difficult joint. Most solder preforms can be flux coated. When incorporating preforms, be sure to consider possible effects on reflow, cleaning, and RoHS compliance.
solder preforms, solder paste, SMT, PCB assembly, through-hole, solder fortification
[Permanent Link to this Paper]
Posted on 9 Mar 2010
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Solder-Ball Manufacturing and Attachment for BGAs
by Dr. Ning-Cheng Lee
Spheres are manufactured via sequential flow/quench or reflow processes, then followed by degreasing and classification. Surface contamination or mis-handling can aggravate sphere solderability. Sphere attachment onto BGA typically is achieved via vacuum-transfer or gravity-dispensing processes, and the spheres are held in place by flux or solder paste before reflow. Welding process also in use. Bumping can be achieved via confined solder paste during reflow. Bumping with Sn62/Sn63 spheres & paste yields excellent results. Bumping with Sn62/Sn63 spheres & flux desires high viscosity, high volatility, large pitch, low print thickness, low flux activity, & small pads. Bumping with Sn10 sphere & paste exhibits no missing, and the yield increases with decreasing print thickness, decreasing volatility, increasing sphere solderability, increasing flux activity, increasing pad size, increasing metal load, & increasing pad solderability. The yield is not affected by viscosity, pitch, and reflow profile. For bumping with paste alone approach, easily releasable paste is crucial for regular print-release-reflow process. Bumping with integrated preform is promising. Reducing the thickness & width of solder links is essential for better yield.
solder, sphere, ball, BGA, Bumping, attachment, flux, solder paste, pb-free, lead-free
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Soldering Challenges in a Halogen-Free PCB Assembly Process (Chinese)
by Amanda Hartnett, Dr. Ronald C. Lasky, Timothy Jensen
Chinese version of Soldering Challenges in a Halogen-Free PCB Assembly Process
halogen-free, halide-free, solder, soldering, graping, flux, head-in-pillow, hole-fill, CHINESE LANGUAGE
[Permanent Link to this Paper]
Posted on 13 May 2011
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Soldering Challenges in a Halogen-Free PCB Assembly Process (English)
by Timothy Jensen, Dr. Ronald C. Lasky, Amanda Hartnett
Flame retardants have played an important role in the safety of many products. It is safe to say that thousands of lives have been saved by flame retardants. Flame retardants are used in products as varied as children's pajamas to electronics assemblies. Some of the more successful flame retardants are halogenated compounds. Halogenated materials are found in polyvinyl chloride (PVC), brominated flame retardants (BFRs), chlorinated flame retardants (CFRs), as well as in fluxes used in the electronics assembly industry. Product does not contain any halogenated compounds. However, that is not exactly how the term is used for soldering fluxes. A flux that is classified as
halide-free by the IPC/J-STD-004 is actually only free of ionic halides.
hole-fill, head-in-pillow, flux, graping, soldering, solder, halide-free, halogen-free
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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Soldering Photovoltaic Cells
by Karl Pfluke
Increasingly, electronics manufacturing services (EMS) providers specializing in SMT are seeking to diversify and fill capacity. Photovoltaic (PV) solar cell module assembly is becoming a popular choice to meet those goals. PV cell stringing in solar module assembly is achieved using many common SMT materials and processes. Solders, fluxes, and common reflow technologies produce electrical interconnects in both a-Si and c-Siphotovoltaic technology.
CIG, flux, solder, photovoltaic solar cell assembly, solar module assembly, SMT
[Permanent Link to this Paper]
Posted on 6 Jun 2011
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Soldering Technology for Area Array Packages
by Dr. Ning-Cheng Lee, William Casey
Soldering is the primary interconnection technology for area array packages. Methods for solder bumping for area array packages can be categorized as follows: (1) build-up process, (2) liquid solder transfer, (3) solid solder transfer, and (4) solder paste bumping. The first group includes both evaporation and electroplating processes, while the second group includes meniscus bumping and solder jetting. The third group includes wire bumping, sphere welding, decal solder transfer, tacky dot solder transfer, integrated preform, and pick and-place solder transfer processes, with the last one (pick & place solder transfer) being the current prevailing option. Solder paste bumping exhibits great potential to reduce bumping costs dramatically, and includes the print-detach-reflow, print- reflow-detach, and dispense approaches. For an area array package attachment process, depending on the type of packaging, either flux, fluxless soldering or solder paste printing may be used as the attachment medium. Although area array packaging generally offers a robust process, attention should be paid to reduce defects such as delamination, misalignment, elongated joint, voiding, bridging, opens, cracking, poor wetting and various attachment interactions.
lead-free, pb-free, solder, soldering, area array package, Flip Chip, BGA, CSP, sphere, Bumping, paste, flux, fluxless
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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Soldering: Is the automotive assembler really different to anyone else?
by Mike Fenner
About 40 years ago, automotive manufacturers started to use solid-state devices to replace electro-mechanical voltage regulators. The use of electronics has grown inexorably from those simple two transistor devices. Today, electronics are fundamental to the safe and efficient operation of every vehicle, with over one third of a car’s value represented by electronics. Solders, and the soldering process, are an intrinsic part of any electronics assembly. This article presents an overview of the automotive assembler’s requirements and how these are met. Arising from the transition to Pb-free and the EU RoHS Directive, legislative, safety and environmental compliance issues now exercise a dominant role and must be addressed.
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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Specification Limits Review for Solder Paste Stencil Print Inspection (SPI)
by Chris Anglin, David Sbiroli, Ed Briggs
The continual miniaturization of electronics components for personal electronics devices, coupled with the conversion to RoHS- and REACH-compliant lead-free assemblies, has put a tremendous strain on the electronics assembly industry. Introduction of 01005 passives, and active components on the order of 0.3mm pitch, initiates newly defined questions about specification limits for solder paste stencil print performance.
This paper discusses variability of solder paste print performance and its relationship to specification limits. The objective is to describe analyses to determine stencil print process character, using actual paste print measurement data. Aside from setting specification limits, application of statistical methods for the analysis of variation in stencil print performance could help understand appropriate production statistical process control (SPC) limits sought by SMT manufacturing and quality engineers from stencil print inspection results that are gathered during SMT assembly.
Effects on values of Cp and Cpk by various specification limits are presented. This discussion is based on recent application development experiments, to elucidate how average solder paste measurement and standard deviation measurement effect new print process capability challenges. From this work, a strategy to optimize a new 01005 stencil printing process is reviewed. Importantly, the discussion includes key factors with planning quality aspects of SMT assembly. SPC techniques presented will show how to measure stencil print performance capability, and result in opportunity for reduced assembly costs and increased sales income.
transfer efficiency, process capability study, capability ratio, statistical process control (SPC), control charts, stencil aperture design, pad design, solder paste, area ratio
[Permanent Link to this Paper]
Posted on 24 Jan 2011
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Stencil Printing Transfer Efficiency of Circular vs. Square Apertures with the Same Solder Paste Volume
by Chris Anglin, Ed Briggs
This paper is a summary of best practices in optimizing the printing process focusing on comparison of large and small apertures, square vs. round, not with the same area ratio but with similar or the same volume. This paper will definitively clear the air on the round versus square aperture debate.
SMT, circuit board assembly, stencil apertures, solder paste, stencil printing
[Permanent Link to this Paper]
Posted on 21 Jun 2011
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Sticking with it: Solder Use in Chip Packaging
by Adrian Low, Jim Hisert, Andy C. Mackie PhD
Although there are some unsubstantiated claims that the history of solder reaches back 7000 years (Ref. 1), it seems more likely that the first
gold-tin solders were used in jewelry in the Egyptian Early Dynastic Era, around 5000 years ago (Ref. 2).
Why is solder still the overwhelming choice for interconnects when high-tech alternatives abound? The answer is simple: Solder is the only electrically conductive
joining material that is so compatible with the metal surface it is joining to that it intermingles on the atomic level.
Solder Melting, solder alloy, solder, pb-free, Flux Cleaning, flux, BGA, ball attach
[Permanent Link to this Paper]
Posted on 15 Oct 2009
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Stress-Free Bonding of Large Linear Sputtering Targets for LCD Displays
by A. Duckham, H.B. Parker, T.J. Acchione, M.A. Curran, J.E. Newson, N.G. Piegari, D.M. Lunking, E.L. Walters, D.B. Deger
A process for bonding stress free, flat assemblies of late generation Liquid Crystal Displays (LCD) sputtering targets using reactive multilayer foil as a localized heat source has been developed. This paper will demonstrate the capability of bonding targets to backing plates of sizes up to those typical of Generation (Gen) 10 and on material combinations with widely divergent Coefficients of Thermal Expansion (CTE).
sputtering target, NanoFoil, NanoBond, LCD, target bonding
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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Sustainability of Indium and Gallium Supplies in the Face of Emerging Markets
by Michael D Murphy, Claire Mikolajczak
The elements indium and gallium are key components in the manufacture
of products in high volume emerging markets. The strategic nature of these
elements, coupled with some published reports concerning shortages, has
raised some legitimate questions about the sustainability of their supply chains.
Indium Corporation has studied these markets as well as the mining and refining
operations in detail. In this paper, we intend to answer these questions.
CIG, ITO, FPD, metal supply, gallium, indium, SVC Tech Con 2011
[Permanent Link to this Paper]
Posted on 19 Apr 2011
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Sustaining a Robust Fine Feature Printing Process
by George Babka, David Sbiroli, Richard Brooks, Chris Anglin
With the introduction of 01005 chip components and 0.3 mm pitch CSP devices, electronic component packaging is pushing surface mount technology to the limits of its potential. Miniaturization is driving the electronics industry to implement the smallest and tightest pitch components in order to meet their customer demands. But how much miniaturization is possible before there is a paradigm shift in the technology? At what point is solder paste no longer viable? How small of a feature can be printed with solder paste, and can this process be implemented into a production environment?
Most of the factors and critical parameters in ultra-fine pitch printing have been well understood and documented for over twenty years. Some of these parameters are squeegee speed, squeegee pressure, stencil design (technology, thickness & area ratio), and solder paste. But as the pitch and aperture sizes get smaller and smaller, we begin to see that additional factors start to have an increased effect on the solder paste deposition (transfer efficiency). What are these factors and can we control them in order to obtain acceptable results for transfer efficiency and minimized variability? This paper will evaluate these additional factors and how they affect the transfer efficiency of the paste.
ultra-fine pitch printing, separation speed, stencil technology, stencil design, pad design, solder powder, tooling, solder paste, area ratio
[Permanent Link to this Paper]
Posted on 15 Oct 2009
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Tabbing and Bus Ribbon for Solar Assembly
by Jim Hisert
The interconnection of solar cells is a technology that has been around for hundreds of years, but is a relatively new application of the soldering process. By combining the metallurgical knowledge of solder joints (which has been developed through other applications) and new materials designed specifically for solar manufacturing, solar cells and cell strings can be effectively connected with high throughput, conductivity, and reliability.
Stringing of solar cells is used across the solar industry, and is a process that newcomers to the solar industry should be familiar with. However, it is a process that even experts still need to optimize. The top layer of a solar cell is a transparent conductive oxide (TCO) to which solder will not adhere. Therefore, a metallization paste is used to bond to the TCO and provide a solderable surface for strips of solder-coated copper called tabbing or stringing ribbon. These ribbons are commonly applied as parallel strips that weave from the top of one cell to the bottom of the next to connect the positive and negative sides of the cells in series. Once connected, the tabbing ribbon channels electrical current to larger solder-coated copper strips, known as bus ribbon. Bus ribbon serves as an input/output for the entire solar array to the module junction box.
bus ribbon, flux, solar, tabbing ribbon
[Permanent Link to this Paper]
Posted on 15 Oct 2009
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Testing and Prevention of Head-In-Pillow
by Dr. Ning-Cheng Lee, Dr. Yan Liu, Pamela Fiacco
Head-in-pillow (HIP) is ailing the electronic industry when assembling BGAs or CSPs onto PCBs. It is caused by warpage of components or boards at reflow process, and is aggravated by oxidation. Methods for assessing the potential for occurrence of HIP are highly desired by the industry. Besides using BGA rework station followed by tedious dye and pry treatment, two other simpler methods are introduced in this work, Tiny Dot Paste method and Ball Onto Paste method. The Tiny Dot Paste method is stressed on the assessment of oxidation barrier capability of solder paste, while Ball Onto Paste method assesses combined capability of oxidation resistance and excessive fluxing capacity. Both methods are quick, easy, and close simulation, with the latter being better in real process simulation. Prevention of HIP can be accomplished by (1) designing packages without warpage, (2) printing more paste, (3) dipping solder paste or flux, (4) using inert reflow atmosphere, (5) reducing reflow temperature, (6) placing heat shield on BGA or CSP, (7) avoiding using water soluble solder paste for BGA bumped with no-clean process, (8) using solder bumps or solder powder with oxidation resistant alloy, (9) using fluxes with high oxidation barrier capability and high fluxing capacity. Among all options listed above, using solder paste with high oxidation barrier capability and high fluxing capacity is considered the most easily implemented approaches.
head-in-pillow, solder, soldering, reflow, SMT, solder paste, BGA, CSP
[Permanent Link to this Paper]
Posted on 24 Jan 2011
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The Basics of Soldering
by Chris Nash
In this article, I will present a basic overview of soldering for those who are new to the world of soldering and for those who could use a refresher. I will discuss the definition of soldering, the basics of metallurgy, how to choose the proper alloy, the purpose of a flux, soldering temperatures, and typical heating sources for soldering operations.
soldering, metallurgy, flux, Solder Basics
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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The Effect of Powder Surface Area and Oxidation on the Voiding Performance of PoP Solder Pastes
by Brandon Judd
With the miniaturization of components in the semiconductor industry, the need for specialized solder pastes with finer powder mesh sizes for package-on-package (PoP) assemblies has become imperative and increasingly more common. As the powder mesh size decreases (smaller diameter powder), more surface area of powder within the paste is exposed and, therefore, more susceptible to oxidation. The flux vehicle of the solder paste consequentially has more oxides to remove in order to allow for proper coalescence to form a good solder joint. The intent of this paper is to evaluate whether the decreased powder mesh size and increased oxide content of the powder in the PoP pastes affects the voiding performance of the materials, and to what degree.
package-on-package, PoP Solder Paste, Apex 2012
[Permanent Link to this Paper]
Posted on 1 Mar 2012
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The Effects of Flux Residues on Electrical Reliability
by Eric Bastow
With the predominance of no-clean soldering processes and ever decreasing component standoff, the industry has had to consider the reliability of, what may be, partially activated or "gooey" flux residues under component bodies. Similarly, questions have also risen about the reliability of flux residues resulting from the reflow of no-clean solder pastes that are "entrapped" under RF shields or "cans", where escape of the volatile ingredients of the flux is greatly hindered. In this paper, discussion will be made regarding an experiment designed to mimic the aforementioned conditions and how these conditions affected the SIR performance of the no-clean flux residues. A variety of no-clean solder paste flux residues will be discussed, including a halogen-containing, Pb-free solder paste flux; a halogen-free, Pb-free solder paste flux; a halogen-free, Pb-free solder paste flux with a residue optimized for pin probing; and a halogen-free SnPb solder paste flux.
Apex 2011, solder paste, pb-free, halogen-free, no-clean flux, flux residue
[Permanent Link to this Paper]
Posted on 11 Apr 2011
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The Evolution Revolution in Flux
by Jim Hisert, Andy C. Mackie PhD
Ball-attach fluxes for
solder sphere attachment processes are just one example of how fluxes used within the semiconductor market have evolved significantly. Process needs for water-soluble fluxes have sparked the necessary advancements for developing products that meet these
requirements.
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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The Graping Phenomenon: Improving Pb-Free Solder Coalescence Through Process and Material Optimization
by Timothy Jensen
As small surface-mount components such as 0201 and 01005 packages have entered volume assembly, manufacturers are observing increased instances of poor solder coalescence during reflow. The root cause is the change in oxidation behavior at very low volumes of deposited paste. A solution is required, both to restore a high-quality appearance to solder joints and to maintain customer confidence. Comprehensive analysis of factors including material selection, print process settings, reflow profile, and factory-floor practices highlights a number of measures that engineers may apply to solve this issue cost- effectively without impairing satisfactory reflow of other components on the board.
solder paste, pb-free, lead-free, electronics assembly, graping
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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The Long-Term Supply of Indium and Gallium
by Claire Mikolajczak, Greg Phipps, Terry Guckes
indium, gallium, metal supply
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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The Profit Sleuth
by Dr. Ronald C. Lasky
"The Professor", as he is affectionately called by his students and colleagues, is, among other things, a profit sleuth. Using ProfitPro3™ software he has been able to help electronics assembly professionals recover lost profit. Let's go with him to his latest case.
solder paste
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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The Proliferation of Lead-Free Alloys
by Eric Bastow, Timothy Jensen
The advent of the EU’s RoHS law has encouraged a significant amount of research to find an alloy, for electronic assembly that will satisfy RoHS’s lead-free requirement and have optimum process ability and field reliability. The resulting research, much of it lead by iNEMI, resulted in the near eutectic tin-silver-copper alloy SAC387 (Sn95.5Ag3.8Cu0.7) as an initial favorite to fill this need in the early 2000s. By 2004 or so, many people were using SAC305, partially because of its greater resistance to tombstoning. It appeared that SAC305 would become the de-facto lead-free standard alloy for RoHS compliant electronic assembly. However, with the dramatic increase in silver prices in the last few years, SAC105, having 2% less silver was being evaluated and used for its obvious cost savings. Reliability testing of SAC105 also showed that although it did not perform as well as SAC305 in thermal fatigue cycle testing, it was better than SAC305 in drop shock tests. The explosive growth of mobile phone sales, over 1 billion per year, made SAC105’s superior drop shock performance attractive for these and other portable devices.
In addition to research relating to SAC305 and SAC105, much work has been performed on the study of the effects of small quantities (<0.1%) of alloying metals on lead-free alloys’ process ability and reliability performance. These "dopants" can dramatically affect an alloy’s performance.
All of the above work has resulted in what many are calling lead-free alloy proliferation as more and more alloys are being considered for implementation. This proliferation drives up solder paste cost as manufacturers cannot achieve economies of scale. In addition, with so many alloys to consider, it is difficult for researchers to develop extensive data bases of process and reliability performance.
This paper is an overview of this lead-free alloy proliferation and an outlook on how alloy convergence might occur.
solder, SAC, pb-free, dopants, Reliability, thermal cycling, drop testing
[Permanent Link to this Paper]
Posted on 15 Oct 2009
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The Question of Sample Size: Print Performance Trials for Solder Paste Evaluation
by Chris Anglin
Design development of miniaturized electronics for mobile phones and other portable devices continues to challenge the required assembly capability of smaller and smaller components. Some of the components that must soon be assembled to enable these portable electronic devices include 01005 passives and 0.3mm CSPs. In addition, it is widely accepted that about 65% of all end of the line defects occur in the stencil printing process. Given all of the above, it is critical that precision stencil printing processes be further developed to support miniaturized electronic assembly.
This paper is a summary of a sample size consideration used to collect experimental data and the process optimization techniques that are employed to establish a precision SMT printing process. Our results indicate that the industry standard stencil aperture area ratio requirement of >0.66 remains an excellent rule of thumb. However, by optimizing printer setup with custom-board recessed vacuum support, foil-less clamps, squeegee edge guards, etc., and assuring squeegee and stencil quality, we have been able to obtain acceptable stencil printing results with area ratios nearing 0.5 with Type IV solder pastes. The sample size decision tools that are employed to characterize paste performance results will be discussed in detail in the paper.
solder paste, solder paste evaluation, area ratio, stencil printing
[Permanent Link to this Paper]
Posted on 25 Jan 2011
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The Relationship of Components, Alloys and Fluxes
by Dr. Ning-Cheng Lee
Lead has been an indispensable element in solders due to its high ductility, reasonable mechanical strength, low eutectic melting temperature with tin, low surface tension and low cost. Lead-free soldering requirements are an earthquake to the lead infrastructure that has been evolving for several decades. Within the past few years, the relationship among components, alloys and fluxes has already reshuffled. Although the dust has not settled, a picture of this new relationship is emerging. Changes in alloys not only directly impact components and fluxes, but also the relationship between components and fluxes, which in turn impacts the alloys.
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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The Road Ahead for Mobile Phone Manufacturing
by Dr. Ronald C. Lasky
Mobile phones are rapidly becoming the electronic device that defines Generation Y. Witness the comical antics in “Zits” where the teenage son, Jeremy, and his friends often show amazement at how “clueless” their parents are about what a mobile phone can do. One episode that sticks in my mind is a time when Jeremy and his friends were discussing the “old days” with his parents. Jeremy’s father pointed out that when he was a teen there was only one phone in the house. Jeremy’s girl friend then enquired, “How did you keep everyone’s ring tones straight?”
One thing is for sure; the mobile phone is here to stay and competes only with the personal computer as the defining electronic device of the age. Perhaps, in some respects, they don’t compete, as some of today’s mobile phones are really mini PCs.
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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The Superior Drop Test Performance of SAC-Ti Solders and Its Mechanism
by Paul Bachorik, Dr. Ning-Cheng Lee, Dr. Weiping Liu
SAC-Ti alloys exhibited significantly improved drop test performance over not only SAC alloys, but also 63Sn37Pb for ENIG/OSP, NiAu/OSP, and OSP/OSP surface finish systems. The superior performance is attributed to (1)the increased grain size and dendrite size, therefore reduced hardness of solder, (2) inclusion of Ti in the IMC layer, and (3) reduced IMC layer thickness. DSC data indicate that the melting temperature and range were not affected by Ti, but the undercooling was almost completely suppressed. The creep properties of SAC-Ti alloy were comparable with those of SAC alloy, strongly suggesting the gain in drop test performance was not achieved by compromising the thermal fatigue performance. SAC-Mn alloys were also found to outperform SAC alloys and Sn63 for the X/OSP finish combinations studied. In general, SAC-Ti performed equally to or better than SAC-Mn alloys.
fragility, drop test, SAC, tin-silver-copper, lead-free, solder
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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The Value of InPb Solders
by Eric Bastow
The indium-lead (In/Pb) binary system offers numerous alloy combinations. These materials possess mechanical and physical properties which make them useful in many
demanding applications. With small additions of silver (Ag), additional alloys are created, rounding out this set of materials and providing us with a full set of performance capabilities. This is especially valuable in the electronics assembly soldering arena.
With melting temperatures ranging from 154°-313°C, this alloy family offers numerous choices for accommodating temperature sensitive applications, as well as step-soldering operations. In/Pb alloys also possess metallurgical properties that make them particularly suitable for soldering to thick Au metallizations.
Assemblers should not be dissuaded from using this versatile alloy family just because the joints that they form may not have the same visual characteristics that Sn/Pb and Pb-Free alloys have.
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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Thermal Management Materials Choices
by Jordan Ross, Andy C. Mackie PhD, Dave Saums, Bob Jarrett
The rise in the heat flux and total power dissipated from semiconductor devices has been well documented in semiconductor packaging industry forecasts. [1, 2, 3] This increasing heat flux (power per unit area, or power density) is not limited to microprocessors and server processors. This general trend affects a variety of commercial and military power semiconductor devices as well as integrated circuits (IC).
The primary determinant of a thermal solution for a semiconductor device or module is the overall heat dissipation. However, at a macro level, the localized heat flux is typically a more critical concern for device reliability. Hot spots with extremely high heat fluxes are a significant concern in the thermal management of processors, RF, wide band gap, power LED, and other semiconductor devices.
indium metal, phase change materials, TIM, thermal management
[Permanent Link to this Paper]
Posted on 1 Jul 2009
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Thermal Pad Design and Process for Voiding Control at QFN Assembly
by Derrick Herron, Dr. Yan Liu, Dr. Ning-Cheng Lee
Quad-flat no-leads (QFN) package designs are receiving more and more attention in the electronics industry. This package offers a number of benefits including (1) small size, such as a near die size footprint, thin profile, and light weight; (2) easy PCB trace routing due to the use of perimeter I/O pads; (3) reduced lead inductance; and (4) good thermal and electrical performance due to the adoption of exposed copper die-pad technology. These features make the QFN an ideal choice for many new applications where size, weight, electrical, and thermal properties are important. However, the adoption of QFN often runs into voiding issue at SMT assembly. Upon reflow, outgassing of solder paste flux at the large thermal pad has difficulty escaping and inevitably results in voiding. It is well known that the presence of voids will affect the mechanical properties of joints and deteriorate the strength, ductility, creep, and fatigue life. In addition, voids could also produce spot overheating, lessening the reliability of the joints. This is particularly a concern for QFN where the primary function of thermal pads is for heat dissipation. Thermal pad voiding control at QFN assembly is a major challenge due to the large coverage area, large number of thermal via, and low standoff. Both design and process were studied for minimizing and controlling the voiding. Eliminating the thermal via by plugging is most effective in reducing the voiding. For unplugged via situations, a full thermal pad is desired for a low number of via. For a large number of via, a divided thermal pad is preferred due to better venting capability. Placement of a thermal via at the perimeter prevents voiding caused by the via. A wider venting channel has a negligible effect on voiding and reduces joint continuity. For a divided thermal pad, the SMD system is more favorable than the NSMD system, with the latter suffering more voiding due to a thinner solder joint and possibly board outgassing. Performance of a divided thermal pad is dictated by venting accessibility, not by the shape. Voiding reduction increases with increasing venting accessibility, although the introduction of a channel area compromises the continuity of the solder joint. Reduced solder paste volume causes more voiding. Short profiles and long hot profiles are most promising in reducing the voiding. Voiding behavior of a QFN is similar to typical SMT voiding and increases with pad oxidation and further reflow.
voiding, thermal pad, solder, solder paste, SMT, flux, Apex 2011, QFN assembly
[Permanent Link to this Paper]
Posted on 11 Apr 2011
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Thermal Profiling: A Practical Approach to Reflow Profiling
by Liyakathali Koorithodi
In the lead-free era, thermal profiling has a critical role in the SMT assembly process. We discuss the profiling, tools, practical issues, and inspection methods of golden boards, and related tools. As the process window narrows, profiling equipment and/or thermocouple (TC)
errors must be taken into consideration. In addition, the accuracy and attachment method of the thermocouple will significantly impact critical assemblies.
A thermal profile is an important record, process tool, and history of PCB assembly — an electrocardiogram (ECG) of your solder process. Profiling requires in-depth process knowledge and practice. Moreover, it is an art. Reflow soldering profiling warrants more discussion in detail.
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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Through-Hole Assembly Options for Mixed Technology Boards
by Karl Pfluke, Dr. Ronald C. Lasky, Ross B. Berntson
Surface mount assembly has dominated its through-hole predecessor since the early 1990s. The higher density and lower ultimate cost of SMT makes it a preferred assembly technology. However, the mechanical strength of through-hole connections continues to make through-hole the technology of choice in assembling connectors. This presentation will describe the primary methods currently used for through-hole connector assembly: 1) selective wave solder, 2) pin-in-paste (PIP)i reflow, 3) hand soldering and 4) solder preforms. We will show how solder preforms are an excellent alternative when PIP provides insufficient solder.
The wave solder method requires specialized equipment and processes to solder connectors. Pin-in- paste reflow evolved as a way to accomplish through-hole assembly without additional equipment or process steps. In the PIP method, the additional solder required to fill the though-hole barrel is deposited by overprinting the pad in the area of each connector pin, using standard SMT equipment. During reflow, the solder wicks to each pin forming the solder fillet.
This paper explains why pin-through-paste reflow methods based on overprinting solder paste have become more challenging due to an increasing use of Organic Solderability Preservative (OSP), fine- feature devices (e.g. fine pitch connectors) and densely populated PCB layout designs that conflict with requirements for successful use of step-stencils. This paper also shows an example where solder preforms were used to provide extra solder volume for each pin. This work demonstrates how solder preforms provide a viable manufacturing solution to ensure complete through-hole solder joints.
lead-free, pb-free, through-hole connectors, selective wave soldering, mixed technology, intrusive reflow, pin-in-paste, solder preforms
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Tin-Silver Bismuth: A Better Lead-Free Alternative?
by Steve Dowds
As long as we are using components which are finished in Tin-Lead, which we certainly will over the next three to five years, Bismuth-containing solders cannot be used due to the long-term reliability problem associated with Lead-contamination. Despite fears to the contrary there are no problems with the long-term availability of Bismuth.
lead-free, pb-free
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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Understanding SIR
by Eric Bastow, Chris Nash
Many electronics manufacturers perform SIR testing to evaluate solder materials and sometimes the results they obtain differ significantly from those stated by the solder material provider. The difference in the results is typically the result of SIR coupon preparation. This paper will discuss the issue of SIR coupon preparation, board cleaning techniques, and how board cleanliness directly affects SIR results.
solder paste, flux, SIR, surface insulation resistance, solder materials
[Permanent Link to this Paper]
Posted on 20 Jun 2011
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Virtues of Indium as a Thermal Interface Material
by Amanda Hartnett, Dr. Ronald C. Lasky
The element indium is an ideal thermal interface material (TIM) for heat dissipation in many of today’s very fast, very hot integrated circuits. Its key advantage is its high bulk thermal conductivity, but other attributes include a low tensile strength and indium’s ability to lower melting temperatures when alloyed with other elements.
TIM, indium
[Permanent Link to this Paper]
Posted on 10 Mar 2010
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Voiding Control for QFN Assembly
by Dr. Ning-Cheng Lee, Dr. Yan Liu, Derrick Herron
Quad Flat No Leads (QFN) package designs receive more and more attention in electronic industry nowadays. This package offers a number of benefits including (1) small size, such as a near die-sized footprint, thin profile, and light weight; (2) easy PCB trace routing due to the use of perimeter I/O pads; (3) reduced lead inductance; (4) easy PCB trace routing; and (5) good thermal and electrical performance due to the adoption of exposed copper die-pad technology. These features make the QFN an ideal choice for many new applications where size, weight, electrical, and thermal properties are important. However, adoption of QFN often runs into voiding issues at SMT assembly. Upon reflow, outgassing of solder paste flux at the large thermal pad has difficulty escaping and inevitably results in voiding. It is well known that the presence of voids will affect the mechanical properties of joints and deteriorate the strength, ductility, creep, and fatigue life. In addition, voids could also produce spot overheating, lessening the reliability of the joints. This is particularly a concern for QFN where the primary function of thermal pads is for heat dissipation. Thermal pad voiding control at QFN assembly is a major challenge due to the large coverage area, large number of via, and low standoff. Both design and process were studied for minimizing and controlling the voiding. Eliminating the via by plugging is most effective in reducing the voiding. For an open via situation, a full thermal pad is desired for a low number of via. For a large number of via, a divided thermal pad is preferred due to better venting capability. Placement of a via at the perimeter prevents voiding caused by via. A wider venting channel has a negligible effect on voiding and reduces joint continuity. For divided thermal pada, the SMD system is more favorable than the NSMD system, with the latter suffering more voiding due to a thinner solder joint and possibly board outgassing. Performance of a divided thermal pad is dictated by venting accessibility, not by the shape. Voiding reduction increases with increasing venting accessibility, although introduction of a channel area compromises the continuity of solder joint. Reduced solder paste volume causes more voiding. Short profiles and long hot profiles are most promising in reducing the voiding. Voiding behavior of a QFN is similar to typical SMT voiding and increases with pad oxidation and further reflow.
solder paste, reflow, SMT, solder, void
[Permanent Link to this Paper]
Posted on 21 Feb 2011
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Voiding in BGA at Solder Bumping Stage
by Dr. Chingchen S. Chiu, Dr. Ning-Cheng Lee, Kimbela Randle, Christopher Parrish
Voiding in BGA at Sn63 solder bumping stage typically occurs at the interface of eutectic solder and the BGA pad, due to the tendency of forming minimal molten solder surface area at bubble surface. At low voiding level, Pb90 bump systems exhibit more voiding than eutectic Sn-Pb bump systems, primarily due to the sandwich effect which entraps fume bubbles for Pb90 systems. However, at high voiding level, Pb90 bump systems exhibits less voiding than eutectic Sn-Pb bump systems, due to the radius of curvature effect which compresses the bubble size of Pb90 bump systems. In general, the voiding in BGA at solder bumping stage increases with decreasing flux activity, decreasing flux or paste deposition thickness, increasing oxide level of spheres or pads, increasing pad dimension, increasing reflow profile length, and increasing metal content. The sphere oxide effect is more pronounced for Pb90 bump systems than for eutectic Sn-Pb bump systems, due to the immobilized oxide for the former systems as well as the sandwich effect. Voiding also increases with decreasing flux/paste viscosity, presumably due to a decrease in the flux capacity. No correlation can be identified between voiding and flux volatility. The mechanisms of voiding unveiled suggest that the preferential location of voids at interface is inevitable, and use of high melting point sphere for solder bumping helps confining the void size. Surface tension is the most crucial property dictating voiding. It influences the voiding phenomena via tendency of forming minimal liquid surface area at bubble surface and radius of curvature effect.
through-hole connectors, pb-free, lead-free
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Voiding Mechanism in BGA Assembly
by Wanda B. O’Hara, Dr. Ning-Cheng Lee
Voiding in BGA assembly using Sn63 solder bumps is primarily introduced at board-level assembly stage. On the pretinned PCBs, voiding of BGA joints increases with increasing solvent volatility, increasing metal content, and increasing reflow temperature, and with decreasing powder size. This can be explained by a viscosity dictated flux-exclusion-rate model. In this model, a higher viscosity in fluxing medium at reflow temperature could hinder the exclusion of flux from the interior of molten solder, hence increase the chance of outgassing due to the increasing amount of entrapped flux, and consequently result in a higher voiding in BGA assembly. Flux activity and reflow atmosphere appear to have negligible effect on voiding when the solderability of the immobile metallization is not a concern. Increase in void content is accompanied by an increase in fraction of large voids. This suggests that, similar to voiding phenomena in SMT process, factors causing voiding in BGA will have an even greater impact on the joint reliability than what shown by the total-void-volume analysis results.
void, BGA, viscosity, volatility, flux-exclusion-rate, soldering, pb-free, lead-free
[Permanent Link to this Paper]
Posted on 1 Jan 2009
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Voiding Mechanisms in SMT
by Wanda B. Hance, Dr. Ning-Cheng Lee
The mechanisms for void formation are investigated for applications involving solder paste in SMT. Generally the voids are caused by the outgassing of entrapped flux in the sandwiched solder during reflow. The voiding is mainly dictated by the solderability of metallization, and increases with decreasing solderability of metallization, decreasing flux activity, increasing metal load of powder, and increasing coverage area under the lead of the joint. Decrease in the solder powder particle size shows only a slightly negative effect toward voiding. The data indicate that voiding is also a function of the timing between the coalescing of solder powder and the elimination of immobile metallization oxide. The sooner the paste coalescing occurs, the worse the voiding will be. Increase in voiding usually is accompanied by an increasing fraction of large voids, suggesting factors causing voiding will have an even greater impact on the joint reliability than what shown by the total-void-volume analysis results. Preliminary data show that certain predry treatment and flux solvent with higher boiling point appear to cause increased voiding.
lead-free, pb-free, solderability, reflow, solder joint, SMT, voiding, void, flux, solder paste, soldering, solder
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Posted on 1 Jan 2009
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Voiding of Lead-Free Soldering at Microvia
by Benjamin E. Nieman, Dr. Hyoryoon Jo, Dr. Ning-Cheng Lee
Microvia technology is a critical element in high density interconnect development. It allows realization of low cost, high density, high speed and miniaturization for electronic devices. However, accompanied with all of the advantages described above is the observation of a high occurrence rate of voiding in the
solder joints. Presence of voids in the solder joints often affects the mechanical properties of joints and deteriorates the strength, ductility, creep and fatigue life, due to the growth in voids, which could coalesce to form ductile cracks and consequently lead to failure. The deterioration could also be due to the enhanced magnitude of the stresses and strains of solder caused by voids. In addition, voids could also produce spot overheating, hence lessen the reliability of joints. Although voiding in typical solder joints has been studied extensively, very little work has been done on the emerging microvia applications which appear to be more prone to voiding problems. In this study, the effect of materials and processes on voiding in microvia, such as printing process, solder particle size, metal content, solderability of pads, reflow profile, and flux chemistry are studied. Results of investigation indicate that voiding was found to decrease with increasing number of print, increasing flux activity, decreasing solder powder size, decreasing metal content, decreasing peak temperature, and use of linear ramp profile instead of profile with a soaking zone. Voiding is affected by variation in flux chemistry. But the second pass for air reflow does not suffer deterioration in voiding. Among all, profile effects are relatively moderate, and double print, powder size, and flux activity effects are more pronounced. The voiding mechanisms for microvia applications are mostly similar to that using regular pads. Hole-filling capability is a new element contributing to voiding in microvia. Lead-free soldering does not introduce new voiding mechanism here.
pb-free, lead-free
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Posted on 10 Mar 2010
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Wave and Rework in a Pb-Free Environment
by Geoff Beckwith, Leo Devine, Mike Fenner
The RoHS upheaval led to a huge investment in research, and even greater output of words describing the best solder paste for reflow and the best alloy for wave. However, curiously little is seen on the most appropriate wave fluxes and less still on flux cored solder wire. This article is meant to fill that void.
pb-free, Rework
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Posted on 10 Mar 2010
