White Papers

Indium Corporation conducts extensive research on the soldering fundamentals for Surface Mount Technology and other electronics applications.

Browse our library for abstracts of some of the most popular published articles that you may find useful in your efforts to improve your process results. All papers in our library are available for download.

Check the box next to each paper you want to download. You may download as many papers as you wish. After selecting papers and completing the contact information form on this page, the paper(s) will be e-mailed to you at the e-mail address you provide.

    Papers about LED

  • Evaluation of Test Protocol for Eutectic Die-Attach Using High Power LEDs

    by Amanda Hartnett, Daniel Evans Jr., Don Beck, Seth Homer

    High-power semiconductor devices, such as high-brightness LEDs, must be mounted using a robust die-attach material that can handle the temperature fluctuations generated by the chip and mechanical stresses due to CTE mismatches between the die material and substrate to which it is mounted. The selected material must also comply with current legislation, which restricts manufactured products containing numerous materials due to environmental concerns, including some that were historically popular in this application. Eutectic gold-tin (AuSn) materials meet these requirements, and process recommendations for their implementation will be presented. Utilizing Palomar Technologies’ die bonder, AuSn solder preforms and solder paste will be placed/dispensed and reflowed using a Pulse Heat System (PHS). Evaluation methods comparing these means of eutectic die-attach to a pre- plated AuSn die will be discussed. Technical generalizations will be detailed to explain the derivation of test method as well as hypotheses of results.

    gold-tin solder, LED, die bonder, solder preforms, solder paste, automated pick-and-place, eutectic die-attach, solder spread

    Posted on 14 Oct 2011

  • Room Temperature LED and D-Pak Type Component-Attach and Reliability Testing

    by Mario Scalzo, Thomas Acchione

    Engineers working with LED and D-pak type component-attach are looking for improved assembly materials and process enhancements to increase throughput, reduce cost, and improve product efficiency and reliability. Many of these packages are susceptible to higher voiding on the ground plate-attach during reflow. A room temperature process would lower voiding, reduce the failure rate, and increase the lifetime of the component. Technology developments have proven that it is possible to use a localized heat source to bond components at room temperature. This paper discusses the bonding of LED and D-pak components at room temperature. It also talks about the quality and long term reliability of the components. The presentation will demonstrate the component bonding process both manually and through the use of automation, and show attendees how to verify the performance of the components post bonding.

    NanoFoil, NanoBond, LED, CTE mismatch, room temperature bonding

    Posted on 24 Jan 2011

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