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Indium Corporation conducts extensive research on the soldering fundamentals for Surface Mount Technology and other electronics applications.

Browse our library for abstracts of some of the most popular published articles that you may find useful in your efforts to improve your process results. All papers in our library are available for download.

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    Papers about area array package

  • Solder Bumping Via Paste Reflow For Area Array Packages

    by Dr. Benlih Huang, Dr. Ning-Cheng Lee

    Several unique solder paste systems have been developed and tested for 63Sn/37Pb solder bumping for wafer, CSP, and BGA with the low cost print-detach-reflow process. The results indicate that the bump height achieved is very adequate and consistent for all three area array package systems. Microstructure of solder bumps appears normal. The yield is also very high for both before reflow and after reflow condition, and is dictated by printing performance. With the unique high slump resistance exhibited by those newly developed pastes, the paste transfer efficiency at printing stage becomes the most critical performance for this process. The transfer efficiency increases with increasing area ratio, increasing taper angle, decreasing pitch, decreasing stencil thickness, decreasing challenge, with adoption of square aperture design, and is not sensitive to aspect ratio of aperture to solder particle size. The paste systems appear to have more potential for depositing a larger amount of paste per unit pitch, as evidenced by the linear relation between expected paste volume and the deposited paste volume. Increasing metal content helps improving bumping performance. The bottleneck of increasing bumping performance for wafer applications appears to be developing a stencil manufacturing technology capable of providing an aperture pattern with spacing considerably smaller than the stencil thickness. Slow print speed is also essential for adequate printing. A non-shiny non-smooth stencil surface is considered beneficial for aiding paste rolling. The flux residue of those pastes is cleanable with solvents.

    solder, soldering, area array package, Flip Chip, BGA, CSP, sphere, Bumping, paste, flux, fluxless, pb-free, lead-free

    Posted on 1 Jan 2009

  • Soldering Technology for Area Array Packages

    by Dr. Ning-Cheng Lee, William Casey

    Soldering is the primary interconnection technology for area array packages. Methods for solder bumping for area array packages can be categorized as follows: (1) build-up process, (2) liquid solder transfer, (3) solid solder transfer, and (4) solder paste bumping. The first group includes both evaporation and electroplating processes, while the second group includes meniscus bumping and solder jetting. The third group includes wire bumping, sphere welding, decal solder transfer, tacky dot solder transfer, integrated preform, and pick and-place solder transfer processes, with the last one (pick & place solder transfer) being the current prevailing option. Solder paste bumping exhibits great potential to reduce bumping costs dramatically, and includes the print-detach-reflow, print- reflow-detach, and dispense approaches. For an area array package attachment process, depending on the type of packaging, either flux, fluxless soldering or solder paste printing may be used as the attachment medium. Although area array packaging generally offers a robust process, attention should be paid to reduce defects such as delamination, misalignment, elongated joint, voiding, bridging, opens, cracking, poor wetting and various attachment interactions.

    lead-free, pb-free, solder, soldering, area array package, Flip Chip, BGA, CSP, sphere, Bumping, paste, flux, fluxless

    Posted on 10 Mar 2010

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