Papers about solder paste
by Dr. Ning-Cheng Lee , Iris Artaki, James Slattery, John R. Sovinsky, Paul T. Vianco
Environmental and toxicity concerns related to the use of lead have initiated the search for acceptable, alternate joining materials for electronics assembly. This paper describes a novel
lead-free solder designed as a "drop in" replacement for common tin/lead eutectic solder. The physical and mechanical properties of this solder are discussed in detail with comparison to tin/lead eutectic solder. The performance of this solder when used for electronics assembly is discussed and compared to other common solders. Fatigue testing results are reported for thermal cycling electronics assemblies soldered with this lead-free composition. The paper concludes with a discussion on indium metal availability, supply and price.
pb-free, surface mount, SMT, solder paste, reflow, electronic, lead-free, soldering, solder
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Paul A. Jaeger, Dr. Ning-Cheng Lee
As one of the major approaches to address the CFC issue, no-clean solder paste has received rapidly increasing attention. Although currently the industry seems to accept full residue paste as a temporary solution, the low residue no-clean paste technology using inert or reactive atmosphere advances immensely to meet the challenge. Presently consensus has not been established yet regarding how low a residue level could be achieved and how inert the atmospheres needs to be. In this study, a semi-empirical model is proposed to predict the soldering performance of low residue solder pastes under various levels of inert reflow atmosphere. The model predicts that the soldering performance would improve rapidly then gradually level off with decreasing oxygen content. The soldering performance vs oxygen content curves are superimposable, with the lower residue one leveling off at lower oxygen level. In general, the experimental data match this model fairly well. However, the data also indicate that, although inert atmosphere improves soldering performance, the optimum condition for bond strength performance seems to demand the presence of some oxygen. This unexpected behavior suggests that a very tight low oxygen level control may not be required. The mechanism responsible for this phenomenon can be attributed to oxidation-induced resin crosslinking. This slows down the flux drying rate as well as hinders the permeation of oxygen through the flux layer.
lead-free, pb-free, nitrogen, flux, reflow, soldering, low-residue, no-clean, solder paste, solder
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Sunil Chhabra, Sergio Porcari, Steven Rocco Marongelli, Dr. Richard Ludwig, Dr. Ning-Cheng Lee
In order to achieve ultra-fine dot solder paste dispensing, both solder material and dispensing equipment have to be optimized. Dispensability of solder paste was evaluated in terms of “dispensing rate”, consistency of dispensing rate, and the stability of dispensing rate with time. Within the given conditions, threshold values for dispensability seem to exist for viscosity, powder size, and metal content. Small nozzle inner diameter is definitely needed to deliver a small dot size. Archimedes Metering Valve shows a greater flexibility in metering the volume than Positive Displacement Pump, primarily due to a greater sensitivity in dispensing volume to variation in pressure, and nozzle ID, besides being very sensitive to variation in encoder count. For success in high speed ultra-fine dot dispensing process, solder pastes with a low viscosity, small powder size, low metal content, and a high thixotropy are desired to deliver a high dispensing throughput. Controlwise, a high pressure and high encoder count may be promising. The consistency improves with increasing metal content, thixotropy, pressure, nozzle size, and encoder count. Viscosity, powder size, and delay time appear to have negligible effect on consistency. The stability increases with increasing flux activation temperature, and is expected to be poor for low thixotropy and low viscosity. Large powder size may cause immediate clogging, while small powder size may cold weld under repeated pressure cycling using pneumatic pump systems. In general, a very careful design and tight control of parameters discussed in this work has to be implemented in order to succeed in ultra-fine dot solder paste dispensing.
lead-free, pb-free, piston, Archimedes, fine dot, pump, SMT, surface mount, flux, solder paste, dispensability, dispensing
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Mario Scalzo
Chinese version of Addressing the Challenge of Head-in-Pillow Defects in Electronics Assembly.
CHINESE LANGUAGE, halogen-free, head-in-pillow, pb-free, solder defects, solder paste, solder reliability, lead-free
[Permanent Link to this Paper ]
Posted on 11 Mar 2010
by Mario Scalzo
White Paper Video
Addressing the Challenge of Head-in-Pillow Defects in Electronics Assembly
This video requires Adobe Flash Player to play correctly. Download the player for free .
The head-in-pillow defect has become a relatively common failure mode in the industry since the implementation of
Pb-free technologies, generating much concern. A head-in-pillow defect is the incomplete wetting of the entire solder joint of a ball-grid array (BGA), chip-scale package (CSP), or even a package- on-package (PoP), and is characterized as a process anomaly, where the solder paste and BGA ball both reflow but do not coalesce. When looking at a cross- section, it actually looks like a head has pressed into a soft pillow. There are two main sources of head-in-pillow defects: poor wetting and printed writing board (PWB) or package warpage. Poor wetting can result from a variety of sources, such as solder ball oxidation, an inappropriate thermal reflow profile or poor fluxing action. This paper addresses the three sources or contributing issues (supply, process and material) of the head-in-pillow defects. It will thoroughly review these three issues and how they relate to result in head-in-pillow defects. In addition, a head-in-pillow elimination plan will be presented with real life examples to illustrate these solutions.
lead-free, solder reliability, solder paste, solder defects, pb-free, head-in-pillow, halogen-free
[Permanent Link to this Paper ]
Posted on 11 May 2009
by Dr. Ronald C. Lasky , Paul Socha , Carol Gowans
Although many have predicted the demise of through-hole components, they
are alive and well with tens of billions assembled each year. In many cases
these components are assembled by wave soldering. However, in many mixed
product technology (i.e. SMT and through-hole on the same board) products,
it makes sense to consider assembling the through-hole components with the
pin-in-paste (PIP) process. PIP has been successfully used for several decades
now; however in many cases it is not possible to print enough solder paste to
obtain an acceptable solder joint. In addition to this “solder starved” condition,
the large quantity of solder paste used to form the though-hole joint results in
excess residual flux. This residual flux can lead to difficulties in in-circuit testing
and potential surface insulation resistance concerns.
In light of the above need, solder preforms have been developed. These slugs of
solder typically come in the same sizes as 0402, 0603, and 0805 passive components.
The solder preforms are placed by the component placement machines
onto the solder deposit. This additional solder assures that an adequate solder
joint is formed with a minimum of solder paste and its residual flux.
Although PIP was an early application of solder preforms, more recently other
“solder starved” applications have emerged such as radio frequency (RF)
shields and connectors. In addition, the use of ultra thin stencils in the assembly
of miniaturized components can result in some other components being solder
starved and, hence are candidates for solder preforms.
This paper will cover the design and assembly techniques for using of solder
preforms in the “solder fortification™” needs described above. Several successful
applications will be presented. In some of these applications, defects were
reduced by 95% after implementing solder preforms.
Apex 2011, solder starvation, flux, PIP, pin-in-paste, through-hole, SMT, solder fortification, solder paste, solder preforms
[Permanent Link to this Paper ]
Posted on 11 Apr 2011
by Chris Anglin
The purpose of a solder paste print evaluation is to observe variation in transfer efficiency to the assembly process under conditions that permit careful scrutiny.
Alternative purchasing decisions and process selection reveal various methods of analysis for scrutinizing the solder paste print activity. Many of these methods are based on the assumption that all of the root causes for paste transfer efficiency during paste print trials are known and certain. However, in most cases the amount and timing of these transfer efficiencies are estimated, and uncertainties exist in the estimation process. Furthermore, there is typically much uncertainty with stencil aperture area ratio, and area ratio factors inevitably affect the purchasing criteria more than others. Thus, the printed circuit board assembly industry needs additional analysis techniques for paste evaluation in order to get explicit information on the effects of uncertainties in the stencil aperture area ratio is important.
solder paste, area ratio
[Permanent Link to this Paper ]
Posted on 21 Jan 2011
by Dr. Ronald C. Lasky
Miniaturised electronics and the advent of
lead-free soldering have added new challenges to the SMT electronic assembly process, most notably in the arenas of stencil printing and reflow. Recent work on improving these assembly processes and advances in solder paste technology can help to minimise these process challenges.
halogen-free, solder paste, solder, solder reliability, flux, pb-free, lead-free
[Permanent Link to this Paper ]
Posted on 15 Mar 2009
by Dr. Ronald C. Lasky
It is likely that a modern mobile phone has more computing power than all of the computers that NASA used to send men to the moon in the late 1960s. This idea is especially interesting when one considers that the electronics of that era had almost no integrated circuits (ICs) and that many computer circuits were individual transistors, resistors, and capacitors. Today's PC microprocessors have the equivalent of hundreds of millions of these components, all electrically connected in the IC. Such miniaturization has enabled the electronics revolution.
PCB assembly, electronics assembly, solder joint, solder paste
[Permanent Link to this Paper ]
Posted on 4 Mar 2010
by Dr. Benlih Huang, Dr. Ning-Cheng Lee
Tombstoning of SnAgCu is affected by the solder composition. At vapor phase soldering, both wetting force and wetting time at a temperature well above the melting point have no correlation with the tombstoning behavior. Since tombstoning is caused by unbalanced wetting force, the results suggest that the tombstoning maybe dictated by the wetting at the onset of paste melting stage. A maximal tombstoning rate is observed at 95.5Sn3.5Ag1Cu. The tombstoning rate decreases with increasing deviation in Ag content from this composition. DSC study indicates that this is mainly due to the increasing presence of pasty phase in the solders, which is expected to result in a slower wetting speed at the onset of solder paste melting stage. Surface tension plays a minor role, with lower surface tension correlates with a higher tombstoning rate. SnAgCu composition with a Ag content lower than 3.5%, such as 2.5Ag, is more favorable in terms of reducing tombstoning rate with minimal risk of forming AgSn intermetallic platelet.
pb-free, tombstoning, solder, soldering, solder paste, flux, lead-free, surface mount
[Permanent Link to this Paper ]
Posted on 4 Mar 2010
by Dr. Benlih Huang, Dr. Ning-Cheng Lee
Effect of solder alloy composition and properties on tombstoning of SnAgCu has been investigated. Both wetting force and wetting time at a temperature will above the melting point have no correlation with the tombstoning behavior observed at vapor phase soldering. Since tombstoning is caused by unbalanced wetting force, this unbalanced wetting force may occur at the onset of melting DSC study indicates that the tombstoning rate decreases with increasing pasty temperature range and increasing mass fraction of solid in solder at onset of melting. This slower wetting in turn results in a more balanced wetting force and accordingly reduces the tombstoning. The mass fraction of solid may be the more essential factor. Surface tension also plays a role, with lower surface tension correlates with a higher tombstoning rate. Tombstoning of SnAgCu can be regulated by the solder composition. A maximal tombstoning rate is observed a 95.5Sn3.5Ag1Cu. The tombstoning rate decreases with increasing deviation in Ag content from this composition, particularly toward the end of lower Ag content. SnAgCu composition with a Ag content lower than 3.5%, such as 2.5Ag, is more favorable in terms of reducing tombstoning rate with minimal risk of forming Ag3SN intermetallic platelet.
tombstoning, solder, soldering, solder paste, flux, lead-free, surface mount, pb-free
[Permanent Link to this Paper ]
Posted on 4 Mar 2010
by Jason Bragg, Russell Brush, Polina Snugovesky, Blake Harper, Simin Bagheri, Dr. Ning-Cheng Lee , Dr. Weiping Liu
Board-level drop test performance was evaluated and compared for the following four different solder combinations in BGA/CSP assembly: 1) SnPb paste with SnPb balls, 2) SnPb paste with SAC105Ti balls, 3) SAC305 paste with SAC105Ti balls, and 4) SAC305 paste with SAC105 balls. The presence of Ti improved the drop test performance significantly, despite the voiding side effect caused by its oxidation tendency. It is anticipated that the voiding can be prevented with the development of a more oxidation-resistant flux. The consistently poor drop test performance of 105Ti/SnPb is caused by the wide pasty range resulting from mixing SAC105Ti with Sn63 solder paste. The effect of Ti in this system is overshadowed by the high voiding outcome due to this wide pasty range material. In view of this, the use of a SAC105 BGA with an SnPb solder paste is not recommended, with or without the Ti addition. High reflow temperatures drove the fracture to shift to the interface at the package side, presumably through building up the IMC thickness beyond the threshold value. A lower reflow temperature is recommended. The electrical response is consistent with the complete fracture data, but the complete fracture trend is inconsistent with that of the partial fracture trend, and neither data can provide a full understanding about the failure mode. By integrating the complete fracture and the partial fracture into a “Virtual Fracture”, the failure mechanism becomes obvious and data sets become consistent with each other.
SAC305, solder paste, SAC105Ti, SAC, solder sphere, lead-free, drop test, Apex 2012
[Permanent Link to this Paper ]
Posted on 14 Oct 2011
by S. Manian Ramkumar Ph.D., Rita Mohanty Ph.D., CEMA, Chris Anglin, Toshitake Oda
The demand for product miniaturization, especially in the handheld device
area, continues to challenge board assembly industry. The desire to incorporate
more functionality while making the product smaller continues to push board
design to its limit. It is not uncommon to find boards with castle like components
right next to miniature components. This type of board poses special
challenge to the board assemblers as it requires wide range of paste volume
to satisfy both small and large components. One way to address the printing
challenge is to use creative stencil design to meet the solder paste requirement
for both large and small components. Example of stencil design includes step
stencil, dual printing, over size aperture, etc. Stencil printing process at its
most basic level involves pushing solder paste through a stencil (with various
size apertures) by a squeegee blade. As the squeegee blade and the stencil
are in constant contact with the paste during the printing process, their surface
characteristics play an important role in the printing process. The most
important attribute of a stencil is its release characteristic. In other word, how
well the paste releases from the aperture. The paste release in turn depends on
the surface characteristics of the aperture wall and stencil foil surface. Recent
introduction of a new technology, Nano-coating for both stencil and squeegee
blades, has drawn the attention of many researchers. As the name implies,
Nano-coated stencils and blades are made by conventional method such as
laser cut or Electoform then coated with nano functional material to alter the
surface characteristics. This study will evaluate nano-coated stencils for passive
component printing including 01005. Various print experiments will be
conducted using different stencil technology, stencil thicknesses, aperture size,
aperture orientation, aperture shapes, and selected paste type with optimal
print parameters, to understand the effect of chosen factors on the print quality.
Print quality will be determined by visual inspection and 3D measurement of
the paste deposit to understand the volume transfer efficiency.
Apex 2011, solder paste, transfer efficiency, area ratio, stencil technology, broadband printing, nano-coated stencil
[Permanent Link to this Paper ]
Posted on 11 Apr 2011
by Karl Pfluke , Richard H. Short
The advent of Lead-Free Soldering presents many manufacturers with the need to Wave Solder using
Lead-Free Alloys . These alloys melt and are soldered at temperatures well above conventional SNPB processing temperatures. This creates several well-documented problems. This article offers a proven and practical alternative to the Lead-Free Wave Soldering Process.
lead-free, wave solder flux, pb-free, Rework, solder preforms, solder paste, solder reliability
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Karl Pfluke , Richard H. Short
German version of Eliminate Lead-free Wave Soldering.
lead-free, wave solder flux, German language, pb-free, Rework, solder preforms, solder paste, solder reliability
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Dr. Anu Maria, K. P. Rangan, Rajkumar B. Raj, Dr. Ning-Cheng Lee , Dr. Xiaohua Bao
Rheology of a solder paste has a significant effect on its stencil printing, tack, and slump performance. This paper describes a series of tests designed to investigate the rheological properties of a suite of solder pastes and fluxes, and the correlation with the solder paste performance prior to reflow. Data indicate that 1) print defect is proportional to the compliance (J1 and J2) and inversely proportional to the elastic properties (G’/G’’ and Recovery) and meta-rigidity (Yield Stress); 2) slump resistance is proportional to elastic properties (Recovery), solid characteristics (Stress [G’=G’’]), and rigidity ( êG* ê); 3) high elastic properties (Recovery), low compliance (J1 and J2), and low solid characteristics (Stress [G’=G’’]) are required in order to achieve high tack value. Good correlation between fluxes and solder pastes are observed for Yield Stress and Recovery only, suggesting those two properties are primarily dictated by fluxes.
lead-free, pb-free, viscosity, flux, tack, slump, print, rheology, solder paste, soldering, solder
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Chris Anglin
White Paper Video
Establishing a Precision Stencil Printing Process for Miniaturized Electronics Assembly
This video requires Adobe Flash Player to play correctly. Download the player for free .
The advent of miniaturized electronics for mobile phones and other portable devices has required the assembly of smaller and smaller components. Currently 01005 passives and 0.3mm CSPs are some of the components that must be assembled to enable these portable electronic devices. It is widely accepted that about 65% of all end of the line defects occur in the stencil printing process. Given all of the above it is critical that a precision stencil printing process be developed to support miniaturized electronic assembly.
This paper will be a summary of a significant amount of experimental data and process optimization techniques that were employed to establish precision SMT printing process. Our results indicate that the industry standard stencil aperture aspect ratio requirement of > 0.66 is an excellent rule of thumb. However, by optimizing printer setup with vacuum support, foil-less clamps, squeegee edge guards etc and assuring cleanliness and squeegee and stencil quality, we have been able to obtain acceptable stencil printing results with area ratios of 0.5 with Type III solder pastes. The work that was performed to achieve these results will be discussed in detail in the paper.
halogen-free, solder paste, solder, solder reliability, flux, solder quality, stencil printing
[Permanent Link to this Paper ]
Posted on 11 May 2009
by Amanda Hartnett , Daniel Evans Jr., Don Beck, Seth Homer
High-power semiconductor devices, such as high-brightness LEDs, must be mounted using a robust die-attach material that can handle the temperature fluctuations generated by the chip and mechanical stresses due to CTE mismatches between the die material and substrate to which it is mounted. The selected material must also comply with current legislation, which restricts manufactured products containing numerous materials due to environmental concerns, including some that were historically popular in this application. Eutectic gold-tin (AuSn) materials meet these requirements, and process recommendations for their implementation will be presented.
Utilizing Palomar Technologies’ die bonder, AuSn solder preforms and solder paste will be placed/dispensed and reflowed using a Pulse Heat System (PHS). Evaluation methods comparing these means of eutectic die-attach to a pre- plated AuSn die will be discussed. Technical generalizations will be detailed to explain the derivation of test method as well as hypotheses of results.
gold-tin solder, LED, die bonder, solder preforms, solder paste, automated pick-and-place, eutectic die-attach, solder spread
[Permanent Link to this Paper ]
Posted on 14 Oct 2011
by Ed Briggs , Dr. Ronald C. Lasky , Chris Anglin
Chinese version of Fine Feature Stencil Printing 0.3MM Pitch Components
CHINESE LANGUAGE, solder paste, stencil printing, miniaturization
[Permanent Link to this Paper ]
Posted on 13 May 2011
by Chris Anglin, Dr. Ronald C. Lasky , Ed Briggs
The explosive growth of personal electronic devices such as mobile phones and personal music devices has driven the need for smaller and smaller passive and active electrical components. Not too long ago, 0401 (40 x 10 mils) passives were seen as the ultimate in miniaturization, but recently 0201 and now 01005 passives have arrived, with rumors of even smaller sizes to come. For active electrical components, the 0.4mm pitch component has become commonplace with 0.3mm already in the works. What effect does this miniaturization have on the stencil printing process? Can it meet the challenge? This paper takes a preliminary look at some of the work that has been performed to evaluate the capability of the stencil printing process to print these fine feature components. Discussed is the stencil printing of the small features and efforts to obtain consistent volume in the printed solder paste deposit.
miniaturization, stencil printing, solder paste
[Permanent Link to this Paper ]
Posted on 4 Mar 2010
by HongWen Zhang , Dr. Ning-Cheng Lee
Although lead-free soldering has been main stream in the industry since 2006 with the replacement of the eutectic SnPb system by the SnAgCu system, the development of drop-in lead-free alternatives for high melting high lead solder alloys is still far from mature. The BiAg alloy exhibits acceptable bulk strength, but very poor ductility and wetting. Therefore, it is not acceptable as an option. In this current work, a mixed-powder BiAgX solder paste system has been developed as a viable alternative high temperature lead-free solder. The metal powder in the paste is composed of a high-melting first alloy powder as a majority and the additive powder as a minority. The additive contains a reactive element to react with various metallization surface finishes. The additive will melt and react on the parts before or together with the melting of the majority solder. The reactive element in the additive is designed to be converted completely into IMCs during the reflow process, resulting in a high-melting solder joint. In the mixed-powder paste system, a melting temperature above 260°C was verified by both DSC and TMA data. The mixed-powder solders show significantly improved wetting compared to Bi/11Ag. The voiding and TCT performance are comparable with high-lead solders. The IMC layer thickness of the mixed-powder system is insensitive toward thermal aging at 175°C while the high-lead solders show a considerable increase. The fine and well-dispersed Ag particles in the joint, together with the controlled IMC thickness, are attributed for the reliability improvement.
Apex 2012, solder paste, pb-free, lead-free
[Permanent Link to this Paper ]
Posted on 1 Mar 2012
by Dr. Ronald C. Lasky
If asked what technology product defines today, one might first answer the personal computer (PC). Although, 10 or 15 years ago that might have been the right answer, a little more thought will show that the mobile phone is today's technologically defining product. Sheer numbers tell the story: over 1 billion mobile phones are manufactured each year. Considering that the population of the world is about 6.5 billion souls, 1 billion mobile phones each year is an astounding number. In addition, a mobile phone is likely the most multi-functional personal device in existence. Just think, it can be a phone, camera, personal data assistant, web surfer, email device, text messenger, GPS device, portable music player, portable video player, streaming audio and video player, miniature PC, and probably a few more things. To package and assemble all of this electronic functionality in such a small device is a challenge indeed. This paper will discuss some of the assembly challenges of such miniaturized electronics.
lead-free, graping, stencil printing, solder paste
[Permanent Link to this Paper ]
Posted on 4 Mar 2010
by Dr. Ning-Cheng Lee , HongWen Zhang
Although lead-free soldering has been the main stream of industry since 2006, with the replacement of eutectic SnPb system by SnAgCu system, the development of drop-in lead-free alternatives for high melting high lead solder alloys is still far from mature. BiAg alloy exhibits acceptable bulk strength but very poor ductility and wetting, therefore it is not acceptable as an option. In current work, a mixed powder BiAgX solder paste system has been developed as a viable alternative, high temperature lead free solder. The metal powder in the paste is composed of a high melting first alloy powder as majority and the additive powder as minority. The additive contains a reactive element to react with various metallization surface finishes. The additive will melt and react on the parts before or together with the melting of the majority solder. The reactive element in the additive is designed to be converted completely into IMCs during the reflow process, hence resulting in a high melting solder joint. In the mixed powder paste system, a melting temperature above 260°C was verified by both DSC and TMA data. The mixed powder solders show a significantly improved wetting comparing to Bi11Ag. The voiding and TCT performance are comparable with high lead solders. The IMC layer thickness of the mixed powder system is insensitive toward thermal aging at 175°C, while the high lead ones do show a considerable increase.
BiAg, voiding, wetting, mixed alloy, solder joint, solder paste, solder, lead-free, high temperature
[Permanent Link to this Paper ]
Posted on 20 Oct 2011
by Harish Gadepalli, Rangaraj Dhanasekaran, Dr. S. Manian Ramkumar, Timothy Jensen , Ed Briggs
Quad Flatpack No lead (QFN) packages have become a popular choice in electronics packaging due to its small form factor. They are also gaining rapid industry acceptance because of its excellent thermal and electrical performance. The bottom side of the QFN package has a large thermal pad. This exposed die attach pad effectively conducts heat to the PCB and also provides a stable ground connection. Effective soldering of this surface to the pad on the PCB is required for good thermal dissipation and component functionality. The exposed thermal pad presents various challenges during the surface mount assembly process. One major challenge is solder void formation. Voids are primarily formed due to the entrapment of volatiles in flux outgassing during the reflow process.
The primary objective of this study is to determine optimal parameters to minimize void formation in QFN packages (QFN16 and QFN20), specifically the reflow profile, leadfree solder paste and stencil aperture opening for the thermal pad. A systematic DOE based approach was used to arrive at conclusions, using the ratio of void volume on the thermal pad to the actual volume of solder paste printed as the response variable. Various graphs are presented to understand the impact of different parameters. Interaction graphs were used to determine optimal settings for each parameter.
reflow profile, lead-free, voiding, solder paste
[Permanent Link to this Paper ]
Posted on 21 Jan 2011
by Mike Bixenman D.B.A., Steve Stach, Dr. Ning-Cheng Lee
Ionic Cleanliness testing machines are designed to determine the total ionic content extractable from the printed wiring board for purposes of process control. The conductivity of the extract solution is measured and the results are expressed as sodium chloride equivalence per unit area. The problem with this method is two fold: 1.) Many of today’s low residue flux and lead-free flux residues are not soluble in the extract solution. 2.) Contamination of concern is with site specific components, from which contamination does not correlate to the area of concern. The purpose of this study is to research low residue and lead-free flux structures, identify solvent compositions that will dissolve these residue types, and offer options for performing both bulk and site specific ionic cleanliness testing methods.
lead-free, Cleaning, flux residue, flux, soldering, solder, solder paste, SMT
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Dr. Benlih Huang, Dr. Ning-Cheng Lee
Tombstoning has plagued the surface mount assembly industry for decades. While the problem seemed under control, it has begun creeping in again due to the miniaturization of discretes such as 0402S and 0201S. This article studies tombstoning behavior on a series of SN AG CU Lead-Free Solders and attempts to find a way to control the problem.
lead-free, pb-free, tombstoning, solder, solder paste, SMT, solder alloy, pasty range, soldering, reflow
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Aniket A. Bhave, Daryl Santos PhD, Dr. Ronald C. Lasky
Numerous studies have shown that greater than 60% of end of line defects in SMT assembly can be traced to
solder paste and the printing process. Reflowing adds another 15% or so. In light of this fact, it is surprising that no simplified procedure for solder paste evaluation has been documented. This paper is about such a procedure.
pb-free, lead-free, stencil printing, solder paste, solder paste evaluation
[Permanent Link to this Paper ]
Posted on 31 Mar 2010
by G. Wilson , Mike Fenner , Andy C. Mackie PhD
The use of special purpose solder pastes in power die attach is well-established offering low voiding and
reliable bonding in volume manufacturing. However these materials are designed around high lead alloys and
applied by dispensing. IGBT circuits are made by printing high tin alloys to multiple die sites, placing die and
reflowing in a process more similar to conventional PCB or hybrid thick film assembly. This paper describes
how the opportunity was taken to make use of the latest developments in Pb-free SMT flux technology and re-
optimize them to the different requirements of IGBT die attach.
We rehearse the attributes and requirements of IGBT circuitry and then go on to show how a high
performance Pb-Free solder paste has been developed to meet the requirements of large power die attachment
(LDA) in IGBT module manufacturing processes. The paste has excellent print and handling characteristics and
routinely returns less than 0.5% voiding under large die over a wide range of vacuum reflow conditions. The
flux vehicle chemistry offers ease of cleaning to be compatible with the next stage processes of wire bonding & circuit encapsulation.
Cleaning, wire bonding, void free, die attach, IGBT, solder paste
[Permanent Link to this Paper ]
Posted on 8 Mar 2010
by Marty Carr, John Carr, Richard Brooks
New assembly technologies are being considered for production to reduce size and/or increase functionality. These new technologies include: 0201 & 01005 chip components and 0.4 mm & 0.3 mm pitch CSP devices. In order to implement these new technologies, some major changes in the manufacturing process may have to be addressed. First, the solder paste must provide the ability to print very small apertures, such as 0.008" (0.2mm) & below and with consistent paste release from the stencil. Therefore, one of the possible solutions may be to change the standard solder powder size, which is type 3 powder. Also, because we are printing very small aperture openings, we need to consider changes in the stencil technology. Some of those changes are the stencil type (laser versus electroformed) and the stencil thickness. Additionally, because we are attempting to print very small apertures, the printing process must be in control and characterized. This paper will review the new technology requirements and how they will affect the performance of the solder paste and stencil technology in the manufacturing process, as well as the printing process.
fine pitch printing, stencil technology, stencil design, pad design, solder powder, process characterization, solder paste
[Permanent Link to this Paper ]
Posted on 8 Mar 2010
by Eric Bastow
No-clean soldering processes dominate the commercial electronics manufacturing world. With the explosion of growth in handheld electronics devices, manufacturers have been forced to look for ways to reinforce their assemblies against the inevitable bumps and drops that their products experience in the field. One method of reinforcement has been the utilization of underfills to “glue” certain surface mount devices (SMDs) to the PCB. This provides additional mechanical strength over and above the soldered connections. Bumped SMDs attached to the PCB with a no-clean soldering process offer the unavoidable scenario of the underfill coming in contact with a flux residue. This may or may not create a reliability issue. No-clean solder paste flux chemistries can vary. Some have halogens and others do not. Some have standard residues and others have residues optimized for pin probing. There are also a number of underfill chemistries on the market. Furthermore, underfill curing conditions vary depending on whether the SMDs are exposed on the surface of the PCB or underneath an RF shield. This paper will discuss an experiment designed to measure the electrical reliability of various combinations of underfill and no-clean flux residues, as measured with J-STD-004B SIR (IPC-TM-650 2.6.3.7).
Apex 2012, solder paste, no-clean flux, flux residue
[Permanent Link to this Paper ]
Posted on 1 Mar 2012
by Dr. Ning-Cheng Lee
The reflow profile is engineered to optimize the soldering performance based on defect mechanisms analysis. In general, a slow ramp-up rate is desired in order to minimize hot slump, bridging, tombstoning, skewing, wicking, opens, solder beading, solder balling, and components cracking. A minimized soaking zone reduces voiding, poor wetting, solder balling, and opens. Use of low peak temperature lessens charring, delamination, intermetallics, leaching, dewetting, and voiding. A rapid cooling rate helps reducing intermetallics, charring, leaching, dewetting, and grain size. However, a slow cooling rate reduces solder or pad detachment. The optimized profile favors that the temperature ramps up slowly until reaching about 180°C. The temperature is then gradually raised further up to 186°C within about 30 seconds, then raised rapidly until reaching about 220°C. After that, the temperature is brought down with a rapid cooling rate. The conventional profile was developed due to the limitation of past reflow technologies. Implementation of the optimized profile requires the support of a heating-efficient reflow technology with a controllable heating rate. Vapor phase reflow can provide a rapid heating, but has difficulty to control the heating rate. Infrared reflow can regulate the heating rate, but is sensitive to variation in parts features. Emergence of the forced air convection reflow provides controllable heating rate. In addition, it is not sensitive to variation in parts
features, thus allows the realization of the optimized profile.
lead-free, pb-free, SMT, vapor phase, infrared, convection, soldering, solder paste, flux, defect, profile, reflow
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Dr. Chingchen S. Chiu, Dr. Ning-Cheng Lee
The solder bumping process for BGA is investigated by using solder paste alone, solder spheres with solder paste, and solder spheres with fluxes. Also explored is the use of InTEGRATED® preforms together with either flux or solder paste. For bumping process involving Sn62 or Sn63 spheres, use of paste for sphere attachment produces excellent alignment results. In the case of using fluxes for Sn62 or Sn63 sphere attachment, the defect rate increases with decreasing flux viscosity, decreasing solvent volatility, decreasing pitch dimension, increasing flux deposition thickness, increasing flux activity, and increasing pad diameter. For overall better yield, a solder paste with long stencil life, good printability, and good solder ball performance should be the most promising eutectic sphere attachment material. For systems using pastes for Sn10 sphere attachment, no missing is observed, and the alignment improves with decreasing paste deposition thickness, decreasing solvent volatility, increasing sphere solderability, increasing flux activity, increasing pad dimension, increasing metal load, increasing pad solderability. Paste viscosity, pitch, and reflow profile has negligible effect on the Sn10 bumping yield using Sn63 solder paste. An easily releasable solder paste is crucial for area-array BGA if a regular print-release process is desired for bumping with solder paste alone. Bumping with InTEGRATED® preforms is promising. Reducing the thickness and width of the solder link is considered essential for improving the bumping success rate. Other potential bumping processes may include (1) dispense paste/reflow, (2) print paste/reflow/release, (3) apply solder mask/print paste/release /reflow/strip solder mask, (4) solder jet/reflow, and (5) sphere welding, and are briefly introduced and commented on.
lead-free, balling, bump, Bumping, BGA, solder sphere, solder paste, integrated preforms, flux, defect rate, pb-free, solder
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Dr. Ning-Cheng Lee , Paul A. Jaeger, Manchao Xiao
The probe-testability of no-clean solder paste flux residue at in-circuit-test is determined mainly by the residue amount, residue location, and residue hardness. The testability increases with decreasing amount of residue, decreasing amount of top-side flux spread, and increasing amount of bottom-side flux spread. The residue amount, top-side flux spread, and bottom-side flux spread affect primarily pad probing, pad probing, and pin-tip probing, respectively. Inert reflow atmosphere helps probe penetration. Higher metal load effectively reduces the flux spreading. Among all, the soft residue approach appears to be most promising in providing successful probe contact.
lead-free, pb-free, no-clean, flux residue, solder paste, testability, probe
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Dr. Ronald C. Lasky , Ed Briggs
The explosive growth of personal electronic devices, such as mobile phones and personal music devices, has driven the need for smaller and smaller active and passive electrical components. Not too long ago, 0401 (40 x 10 mils) passives were seen as the ultimate in miniaturization, yet the introduction of 0201s and, most recently, 01005 passives have occurred. For active components, area array packages with 0.4mm lead spacing have become virtually a requirement for enabling the many features in modern portable electronic devices, with 0.3mm packages already on the way.
This miniaturization trend, occurring at the same time as the conversion to RoHS compliant lead-free assembly, has put a considerable strain on the electronic assembly industry. This paper will discuss the specific challenge of the graping effect and the work that has been performed to mitigate this phenomenon. Discussed are the effects of the solder paste material attributes, consistent stencil printing of the small solder paste deposits required, and minimizing oxidation of the small solder paste deposit during reflow. All of these steps are necessary to assure a good finished solder joint.
solder paste, graping, oxidation, stencil printing
[Permanent Link to this Paper ]
Posted on 21 Jan 2011
by Dr. Manchao Xiao, Kevin J. Lawless, Dr. Ning-Cheng Lee
The 12 mil pitch processing is achievable with solder paste. It may also be the limit of solder paste printing technology, mainly due to the scooping problem associated with thin stencils. With decreasing pitch size, both smear and insufficiency rate increase. Tapering of stencil aperture helps thick stencil prints, but hurts on thin stencil printing. Aperture with orientation parallel to squeegee movement results in a higher print defect rate. Overall, use of fine powders is the most effective means to meet most challenges. It helps on achieving high performance in printability, tack, and non-slump, with acceptable trade-off in rheology and tack time. Solder balling may be the primary hurdle. The problem may be resolved by using inert reflow atmosphere or via flux chemistry improvements. A metal load of 90.5 to 91% seems to be the optimum for most properties.
lead-free, pb-free, solder balling, slump, print, Fine Pitch, solder paste
[Permanent Link to this Paper ]
Posted on 9 Mar 2010
by Dr. Ning-Cheng Lee
Reflow soldering of solder paste is the primary interconnection method used in SMT assembly process. The major issues which plague the reflow soldering performance include, but not limited to, bottom-side-component-holding, bridging, dewetting, low-residue, opening, solder balling, solder beading, solder-fillet-lifting, tombstoning, defective balling for BGA, and voiding. The mechanisms, causes, and cures for each issue are briefly discussed in this article.
lead-free, soldering, solder paste, SMT, bridging, dewetting, opening, solder balling, solder beading, solder-fillet-lifting, tombstoning, balling for BGA, voiding, pb-free, reflow
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Dr. Ning-Cheng Lee , Dr. Arnab Dasgupta, Dr. Runsheng Mao, Dr. Yan Liu
Electronic industry has been driven toward lead-free by RoHS (Restriction of Hazardous Substances Directive) which is in force since 2006. Recently REACH (Registration, Evaluation and Authorization of Chemicals) further drives the industry toward halogen-free. As a result, solder pastes for PCB assembly are required or desired to be both lead-free and halogen-free. Lead-free solder alloys in general wet poorer than tin-lead due to the higher surface tension of the former alloys. In the mean time, halogen-free fluxes typically also wet poorer than the more powerful halogen-containing fluxes. Consequently, the lead-free and halogen-free solder paste products that emerged inevitably suffer from a considerably inferior soldering performance than that of conventional halogen-containing tin-lead solder pastes. The deficiencies include poor wetting, solder balling, voiding, graping, head-in-pillow, etc. This gap is particularly significant for fine-pitch applications where the impact of oxidation is more profound. Furthermore, the higher soldering temperature of the higher melting lead-free alloys also aggravates the challenge of in-circuit test for no- clean processes, mainly due to the difficulty for probe to penetrate through the toughened flux residue. Although use of inert reflow atmosphere may alleviate some of the problems, the higher cost of it is prohibitive for most of the manufacturing firms. In this work, a halogen-free lead-free no-clean solder paste system, Indium8.9HF series, has been developed. It exhibits superior oxidation tolerance, thus assures superior resistance against graping, head-in-pillow, solder balling, voiding, and poor wetting for miniaturized electronic applications. In spite of the immense challenge in material science, this system also shows outstanding probe testability, in addition to its very good printability, non- slump, SIR, and ECM performance. The superior performance of this Indium8.9HF system effectively sealed the gap caused by lead-free and halogen-free requirements.
lead-free, halogen-free, no-clean, solder, solder paste, miniaturization, graping, head-in-pillow, voiding, solder balling, probe testability, ICT, oxidation
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Dr. Yan Liu, Pamela Fiacco, Derrick Herron, Dr. Ning-Cheng Lee
Consideration and selection of dip transfer fluxes and solder pastes for PoP assembly are described, based on process considerations. The crucial properties vital for successful dip transfer include homogeneity, open time on the flux/paste bed, volume and consistency of the dip transferred material, open time after the dip transfer before reflow, and solder joint formation. For each property, one or more practical, recommended test methods are described. Overall, this work should provide the assembly house with an easy way to select a flux or solder paste adequate for dip transfer of PoP assembly applications.
PoP, package-on-package, flux, solder paste, dip transfer, soldering, SMT
[Permanent Link to this Paper ]
Posted on 24 Jan 2011
by Wang Ming, Aniket A. Bhave, Dr. Daryl Santos, Dr. Ronald C. Lasky , Sniket A. Bhave
Numerous studies have shown that greater than 60% of end of line defects in SMT assembly can be traced to
solder paste and the printing process. Reflowing adds another 15% or so. In light of this fact, it is surprising that no simplified procedure for solder paste evaluation has been documented. This paper is about such a procedure.
By using designed experiments and the measurement of critical solder paste related process metrics, we were able to develop a solder paste evaluation procedure that maximizes information about the solder paste and its processability while minimizing experimentation. While using only 12 stencil printed PWBs, we were able to generate statistically significant results that enabled us to rank solder pastes according to their performance. Response metrics that were investigated were print volume and definition before and after pause, squeegee hang up, slump, tack, release from aperture, and solder joint quality.
In addition, we found such variation in solder paste volume repeatability that this criterion alone can be used as a screening procedure.
lead-free, pb-free, solder paste evaluation, solder paste, stencil printing
[Permanent Link to this Paper ]
Posted on 9 Mar 2010
by Dr. Ning-Cheng Lee , Paul A. Jaeger, Wanda B. Hance
Solder beading is a special phenomenon of solder balling when using solder paste in certain SMT applications. In brief, solder beads are large solder balls near components with very low stand-off (see scheme below). With more attention being drawn to no-clean paste applications due to CFC concerns, a better understanding of this event becomes indispensable. In this study, the data indicate solder beading was caused by flux outgassing which overrode the paste cohesive force during the preheat stage. The outgassing promoted the formation of isolated paste aggregates underneath the low clearance components. At reflow, the isolated paste melted and , once emerged from the underside of the components, coalesced into solder beads. Processingwise, this problem can be remedied by slowing down outgassing via a milder preheat profile, or by reducing print thickness. Materialwise, solder beading can be corrected by enhancing the paste cohesive force via cold welding of solder powders during the preheat stage. This in-turn can be accomplished through the use of lower activation temperature flux, coarser solder powder, higher metal load, and solder powders with lower oxide content. Other parameters which could affect the performance will also be discussed.
lead-free, pb-free, solder balling, SMT, flux, solder paste, beading, solder beading
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Maria Durham , Chris Nash
The electronics industry trend toward miniaturization of electronic assemblies has created the necessity for smaller pitch and bumps on chip-scale-packages (CSP) and package-on-package (PoP) components. Smaller pitch and bumped packages have led to the need for novel solder paste material characteristics. The flux vehicle rheology, powder size, and metal load all play a crucial role in the solder material’s dipping and reflow performance. It is equally important to understand the role of the actual dipping and reflow processes with regard to performance of the material.
electronics assembly, solder paste, chip-scale packages, package-on-package, dipping and reflow process, flux
[Permanent Link to this Paper ]
Posted on 22 May 2012
by Timothy Jensen
As the July 1, 2006 Pb-free deadline approaches, many electronics assemblers are beginning to fathom the changes and process demands required. The two biggest material concerns involve solder paste and components. This document provides practical recommendations for evaluating Pb-free solder pastes and ensuring that the selected solder paste will deliver assembly yields comparable to, or better than, the incumbent Sn/Pb solder paste.
lead-free, pb-free, stencil printing, reflow, response to pause, evaluation, solder paste
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Dr. Ning-Cheng Lee , Gregory Evans
This paper focuses on many of the problems facing process engineers today. The experiments used in this study were designed to find the true causes of the problems and headaches which plague SMT assembly today. Data indicate that wicking is caused by a relative hotter component and is aggravated by non-coplanarity. It can be reduced by slower heating rate or more bottom-side heating. Bridging is caused by slumping, and is aggravated by smaller pitch dimension and slower flux wetting speed. Tombstoning is a result of uneven heating. It can be reduced by optimizing pads spacing and by using fluxes with slower wetting speed, or by a smaller print thickness. Problems such as slumping, clogging, solder balls, and white residue are also discussed.
lead-free, pb-free, white residue, solder balling, tombstoning, bridging, wicking, clogging, slumping, SMT, solder paste
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Paul Socha
Paul A. Socha, Indium Corporation, reviews the types of solder preforms and their uses. He offers 10 basic steps to determining if an assembly needs preforms. Solder preforms can be used on a mixed SMT and through-hole PCB or to fortify solder paste on a difficult joint. Most solder preforms can be flux coated. When incorporating preforms, be sure to consider possible effects on reflow, cleaning, and RoHS compliance.
solder preforms, solder paste, SMT, PCB assembly, through-hole, solder fortification
[Permanent Link to this Paper ]
Posted on 9 Mar 2010
by Dr. Ning-Cheng Lee
Spheres are manufactured via sequential flow/quench or reflow processes, then followed by degreasing and classification. Surface contamination or mis-handling can aggravate sphere solderability. Sphere attachment onto BGA typically is achieved via vacuum-transfer or gravity-dispensing processes, and the spheres are held in place by flux or solder paste before reflow. Welding process also in use. Bumping can be achieved via confined solder paste during reflow. Bumping with Sn62/Sn63 spheres & paste yields excellent results. Bumping with Sn62/Sn63 spheres & flux desires high viscosity, high volatility, large pitch, low print thickness, low flux activity, & small pads. Bumping with Sn10 sphere & paste exhibits no missing, and the yield increases with decreasing print thickness, decreasing volatility, increasing sphere solderability, increasing flux activity, increasing pad size, increasing metal load, & increasing pad solderability. The yield is not affected by viscosity, pitch, and reflow profile. For bumping with paste alone approach, easily releasable paste is crucial for regular print-release-reflow process. Bumping with integrated preform is promising. Reducing the thickness & width of solder links is essential for better yield.
solder, sphere, ball, BGA, Bumping, attachment, flux, solder paste, pb-free, lead-free
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
by Chris Anglin, David Sbiroli, Ed Briggs
The continual miniaturization of electronics components for personal electronics devices, coupled with the conversion to RoHS- and REACH-compliant lead-free assemblies, has put a tremendous strain on the electronics assembly industry. Introduction of 01005 passives, and active components on the order of 0.3mm pitch, initiates newly defined questions about specification limits for solder paste stencil print performance.
This paper discusses variability of solder paste print performance and its relationship to specification limits. The objective is to describe analyses to determine stencil print process character, using actual paste print measurement data. Aside from setting specification limits, application of statistical methods for the analysis of variation in stencil print performance could help understand appropriate production statistical process control (SPC) limits sought by SMT manufacturing and quality engineers from stencil print inspection results that are gathered during SMT assembly.
Effects on values of Cp and Cpk by various specification limits are presented. This discussion is based on recent application development experiments, to elucidate how average solder paste measurement and standard deviation measurement effect new print process capability challenges. From this work, a strategy to optimize a new 01005 stencil printing process is reviewed. Importantly, the discussion includes key factors with planning quality aspects of SMT assembly. SPC techniques presented will show how to measure stencil print performance capability, and result in opportunity for reduced assembly costs and increased sales income.
transfer efficiency, process capability study, capability ratio, statistical process control (SPC), control charts, stencil aperture design, pad design, solder paste, area ratio
[Permanent Link to this Paper ]
Posted on 24 Jan 2011
by Chris Anglin, Ed Briggs
This paper is a summary of best practices in optimizing the printing process focusing on comparison of large and small apertures, square vs. round, not with the same area ratio but with similar or the same volume. This paper will definitively clear the air on the round versus square aperture debate.
SMT, circuit board assembly, stencil apertures, solder paste, stencil printing
[Permanent Link to this Paper ]
Posted on 21 Jun 2011
by George Babka, David Sbiroli, Richard Brooks, Chris Anglin
With the introduction of 01005 chip components and 0.3 mm pitch CSP devices, electronic component packaging is pushing surface mount technology to the limits of its potential. Miniaturization is driving the electronics industry to implement the smallest and tightest pitch components in order to meet their customer demands. But how much miniaturization is possible before there is a paradigm shift in the technology? At what point is solder paste no longer viable? How small of a feature can be printed with solder paste, and can this process be implemented into a production environment?
Most of the factors and critical parameters in ultra-fine pitch printing have been well understood and documented for over twenty years. Some of these parameters are squeegee speed, squeegee pressure, stencil design (technology, thickness & area ratio), and solder paste. But as the pitch and aperture sizes get smaller and smaller, we begin to see that additional factors start to have an increased effect on the solder paste deposition (transfer efficiency). What are these factors and can we control them in order to obtain acceptable results for transfer efficiency and minimized variability? This paper will evaluate these additional factors and how they affect the transfer efficiency of the paste.
ultra-fine pitch printing, separation speed, stencil technology, stencil design, pad design, solder powder, tooling, solder paste, area ratio
[Permanent Link to this Paper ]
Posted on 15 Oct 2009
by Dr. Ning-Cheng Lee , Dr. Yan Liu, Pamela Fiacco
Head-in-pillow (HIP) is ailing the electronic industry when assembling BGAs or CSPs onto PCBs. It is caused by warpage of components or boards at reflow process, and is aggravated by oxidation. Methods for assessing the potential for occurrence of HIP are highly desired by the industry. Besides using BGA rework station followed by tedious dye and pry treatment, two other simpler methods are introduced in this work, Tiny Dot Paste method and Ball Onto Paste method. The Tiny Dot Paste method is stressed on the assessment of oxidation barrier capability of solder paste, while Ball Onto Paste method assesses combined capability of oxidation resistance and excessive fluxing capacity. Both methods are quick, easy, and close simulation, with the latter being better in real process simulation. Prevention of HIP can be accomplished by (1) designing packages without warpage, (2) printing more paste, (3) dipping solder paste or flux, (4) using inert reflow atmosphere, (5) reducing reflow temperature, (6) placing heat shield on BGA or CSP, (7) avoiding using water soluble solder paste for BGA bumped with no-clean process, (8) using solder bumps or solder powder with oxidation resistant alloy, (9) using fluxes with high oxidation barrier capability and high fluxing capacity. Among all options listed above, using solder paste with high oxidation barrier capability and high fluxing capacity is considered the most easily implemented approaches.
head-in-pillow, solder, soldering, reflow, SMT, solder paste, BGA, CSP
[Permanent Link to this Paper ]
Posted on 24 Jan 2011
by Eric Bastow
With the predominance of no-clean soldering processes and ever decreasing component standoff, the industry has had to consider the reliability of, what may be, partially activated or "gooey" flux residues under component bodies. Similarly, questions have also risen about the reliability of flux residues resulting from the reflow of no-clean solder pastes that are "entrapped" under RF shields or "cans", where escape of the volatile ingredients of the flux is greatly hindered. In this paper, discussion will be made regarding an experiment designed to mimic the aforementioned conditions and how these conditions affected the SIR performance of the no-clean flux residues. A variety of no-clean solder paste flux residues will be discussed, including a halogen-containing, Pb-free solder paste flux; a halogen-free, Pb-free solder paste flux; a halogen-free, Pb-free solder paste flux with a residue optimized for pin probing; and a halogen-free SnPb solder paste flux.
Apex 2011, solder paste, pb-free, halogen-free, no-clean flux, flux residue
[Permanent Link to this Paper ]
Posted on 11 Apr 2011
by Timothy Jensen
As small surface-mount components such as 0201 and 01005 packages have entered volume assembly, manufacturers are observing increased instances of poor solder coalescence during reflow. The root cause is the change in oxidation behavior at very low volumes of deposited paste. A solution is required, both to restore a high-quality appearance to solder joints and to maintain customer confidence. Comprehensive analysis of factors including material selection, print process settings, reflow profile, and factory-floor practices highlights a number of measures that engineers may apply to solve this issue cost- effectively without impairing satisfactory reflow of other components on the board.
solder paste, pb-free, lead-free, electronics assembly, graping
[Permanent Link to this Paper ]
Posted on 10 Mar 2010
by Dr. Ronald C. Lasky
"The Professor", as he is affectionately called by his students and colleagues, is, among other things, a profit sleuth. Using ProfitPro3™ software he has been able to help electronics assembly professionals recover lost profit. Let's go with him to his latest case.
solder paste
[Permanent Link to this Paper ]
Posted on 10 Mar 2010
by Chris Anglin
Design development of miniaturized electronics for mobile phones and other portable devices continues to challenge the required assembly capability of smaller and smaller components. Some of the components that must soon be assembled to enable these portable electronic devices include 01005 passives and 0.3mm CSPs. In addition, it is widely accepted that about 65% of all end of the line defects occur in the stencil printing process. Given all of the above, it is critical that precision stencil printing processes be further developed to support miniaturized electronic assembly.
This paper is a summary of a sample size consideration used to collect experimental data and the process optimization techniques that are employed to establish a precision SMT printing process. Our results indicate that the industry standard stencil aperture area ratio requirement of >0.66 remains an excellent rule of thumb. However, by optimizing printer setup with custom-board recessed vacuum support, foil-less clamps, squeegee edge guards, etc., and assuring squeegee and stencil quality, we have been able to obtain acceptable stencil printing results with area ratios nearing 0.5 with Type IV solder pastes. The sample size decision tools that are employed to characterize paste performance results will be discussed in detail in the paper.
solder paste, solder paste evaluation, area ratio, stencil printing
[Permanent Link to this Paper ]
Posted on 25 Jan 2011
by Derrick Herron, Dr. Yan Liu, Dr. Ning-Cheng Lee
Quad-flat no-leads (QFN) package designs are receiving more and more attention in the electronics industry. This package offers a number of benefits including (1) small size, such as a near die size footprint, thin profile, and light weight; (2) easy PCB trace routing due to the use of perimeter I/O pads; (3) reduced lead inductance; and (4) good thermal and electrical performance due to the adoption of exposed copper die-pad technology. These features make the QFN an ideal choice for many new applications where size, weight, electrical, and thermal properties are important. However, the adoption of QFN often runs into voiding issue at SMT assembly. Upon reflow, outgassing of solder paste flux at the large thermal pad has difficulty escaping and inevitably results in voiding. It is well known that the presence of voids will affect the mechanical properties of joints and deteriorate the strength, ductility, creep, and fatigue life. In addition, voids could also produce spot overheating, lessening the reliability of the joints. This is particularly a concern for QFN where the primary function of thermal pads is for heat dissipation. Thermal pad voiding control at QFN assembly is a major challenge due to the large coverage area, large number of thermal via, and low standoff. Both design and process were studied for minimizing and controlling the voiding. Eliminating the thermal via by plugging is most effective in reducing the voiding. For unplugged via situations, a full thermal pad is desired for a low number of via. For a large number of via, a divided thermal pad is preferred due to better venting capability. Placement of a thermal via at the perimeter prevents voiding caused by the via. A wider venting channel has a negligible effect on voiding and reduces joint continuity. For a divided thermal pad, the SMD system is more favorable than the NSMD system, with the latter suffering more voiding due to a thinner solder joint and possibly board outgassing. Performance of a divided thermal pad is dictated by venting accessibility, not by the shape. Voiding reduction increases with increasing venting accessibility, although the introduction of a channel area compromises the continuity of the solder joint. Reduced solder paste volume causes more voiding. Short profiles and long hot profiles are most promising in reducing the voiding. Voiding behavior of a QFN is similar to typical SMT voiding and increases with pad oxidation and further reflow.
voiding, thermal pad, solder, solder paste, SMT, flux, Apex 2011, QFN assembly
[Permanent Link to this Paper ]
Posted on 11 Apr 2011
by Eric Bastow , Chris Nash
Many electronics manufacturers perform SIR testing to evaluate solder materials and sometimes the results they obtain differ significantly from those stated by the solder material provider. The difference in the results is typically the result of SIR coupon preparation. This paper will discuss the issue of SIR coupon preparation, board cleaning techniques, and how board cleanliness directly affects SIR results.
solder paste, flux, SIR, surface insulation resistance, solder materials
[Permanent Link to this Paper ]
Posted on 20 Jun 2011
by Dr. Ning-Cheng Lee , Dr. Yan Liu, Derrick Herron
Quad Flat No Leads (QFN) package designs receive more and more attention in electronic industry nowadays. This package offers a number of benefits including (1) small size, such as a near die-sized footprint, thin profile, and light weight; (2) easy PCB trace routing due to the use of perimeter I/O pads; (3) reduced lead inductance; (4) easy PCB trace routing; and (5) good thermal and electrical performance due to the adoption of exposed copper die-pad technology. These features make the QFN an ideal choice for many new applications where size, weight, electrical, and thermal properties are important. However, adoption of QFN often runs into voiding issues at SMT assembly. Upon reflow, outgassing of solder paste flux at the large thermal pad has difficulty escaping and inevitably results in voiding. It is well known that the presence of voids will affect the mechanical properties of joints and deteriorate the strength, ductility, creep, and fatigue life. In addition, voids could also produce spot overheating, lessening the reliability of the joints. This is particularly a concern for QFN where the primary function of thermal pads is for heat dissipation. Thermal pad voiding control at QFN assembly is a major challenge due to the large coverage area, large number of via, and low standoff. Both design and process were studied for minimizing and controlling the voiding. Eliminating the via by plugging is most effective in reducing the voiding. For an open via situation, a full thermal pad is desired for a low number of via. For a large number of via, a divided thermal pad is preferred due to better venting capability. Placement of a via at the perimeter prevents voiding caused by via. A wider venting channel has a negligible effect on voiding and reduces joint continuity. For divided thermal pada, the SMD system is more favorable than the NSMD system, with the latter suffering more voiding due to a thinner solder joint and possibly board outgassing. Performance of a divided thermal pad is dictated by venting accessibility, not by the shape. Voiding reduction increases with increasing venting accessibility, although introduction of a channel area compromises the continuity of solder joint. Reduced solder paste volume causes more voiding. Short profiles and long hot profiles are most promising in reducing the voiding. Voiding behavior of a QFN is similar to typical SMT voiding and increases with pad oxidation and further reflow.
solder paste, reflow, SMT, solder, void
[Permanent Link to this Paper ]
Posted on 21 Feb 2011
by Wanda B. Hance, Dr. Ning-Cheng Lee
The mechanisms for void formation are investigated for applications involving solder paste in SMT. Generally the voids are caused by the outgassing of entrapped flux in the sandwiched solder during reflow. The voiding is mainly dictated by the solderability of metallization, and increases with decreasing solderability of metallization, decreasing flux activity, increasing metal load of powder, and increasing coverage area under the lead of the joint. Decrease in the solder powder particle size shows only a slightly negative effect toward voiding. The data indicate that voiding is also a function of the timing between the coalescing of solder powder and the elimination of immobile metallization oxide. The sooner the paste coalescing occurs, the worse the voiding will be. Increase in voiding usually is accompanied by an increasing fraction of large voids, suggesting factors causing voiding will have an even greater impact on the joint reliability than what shown by the total-void-volume analysis results. Preliminary data show that certain predry treatment and flux solvent with higher boiling point appear to cause increased voiding.
lead-free, pb-free, solderability, reflow, solder joint, SMT, voiding, void, flux, solder paste, soldering, solder
[Permanent Link to this Paper ]
Posted on 1 Jan 2009
