Technical Papers

• A Compliant and Creep Resistant SAC-Al(Ni) Alloy

  By Dr. Benlih Huang, Dr. Hong-Sik Hwang, and Dr. Ning-Cheng Lee [View Bio]

  The addition of Al into SAC alloys results in significant reduction in yield strength and also causes some moderate increase in creep rate. The addition of Ni causes softening of SAC alloys. This paper discusses the research results when Al and Ni are added to SAC alloys.

• Addressing the Challenge of Head-in-Pillow Defects in Electronics Assembly

  By Mario Scalzo [View Bio]

  Head-in-pillow is the incomplete wetting of the entire solder joint of a Ball-Grid Array (BGA) or Chip-Scale Package (CSP), or even a Package-On-Package (PoP). From cross-sections, it actually looks like a head has pressed into a soft pillow. It has become a relatively common failure mode and hence has generated much concern. This paper will be an overview of the head-in-pillow failure mode and discuss a strategy to minimize this troublesome defect.

  There are two main sources of head-in-pillow defects, poor wetting and PWB or package warpage. Poor wetting can result from a variety of sources, such as solder ball oxidation, an inappropriate thermal reflow profile, or poor fluxing action to name a few.

  The paper will address these sources of defects as arising from three “issues”: Supplier Issues, Materials Issues and Process Issues. After thoroughly discussing these issues and how they interplay to result in head-in-pillow defects, a head-in-pillow elimination plan will be presented. Numerous real life examples will be used to illustrate these head-in-pillow solutions.

• Challenges for Implementing a Halogen-Free Process

  By Tim Jensen [View Bio] and Dr. Ron Lasky [View Bio]

  The drive to produce halogen-free electronics has grown significantly, driven partly by legislation and partly by environmentalist organizations. This paper will discuss the challenges of implementing such a halogen-free assembly process. It will start by briefly discussing the reasons that “halogen-free” is with us. The PCB materials that might contain halogens will then be presented. PWB and component concerns will be briefly reviewed. The bulk of the paper will center on the process development issues in establishing a halogen-free assembly process, including solder paste evaluation and selection, solder fluxes, the SMT stencil printing process, reflow and test. Comparisons between halogen containing and halogen-free solder pastes regarding their process performance and reliability will also be presented. The paper will close with a brief review of techniques to analyze halogen content in materials and some of the pitfalls if inappropriate tests are used.

• Eliminate Lead-free Wave Soldering

  By Karl Pfluke and Richard H. Short [View Bio]

  The advent of Lead-Free Soldering presents many manufacturers with the need to Wave Solder using Lead-Free Alloys. These alloys melt and are soldered at temperatures well above conventional SNPB processing temperatures. This creates several well-documented problems. This article offers a proven and practical alternative to the Lead-Free Wave Soldering Process.

• German Version of Eliminate Lead-free Wave Soldering

• Establishing a Precision Stencil Printing Process for Miniaturized Electronics Assembly

  By Chris Anglin

  The advent of miniaturized electronics for mobile phones and other portable devices has required the assembly of smaller and smaller components. Currently 01005 passives and 0.3mm CSPs are some of the components that must be assembled to enable these portable electronic devices. It is widely accepted that about 65% of all end of the line defects occur in the stencil printing process. Given all of the above it is critical that a precision stencil printing process be developed to support miniaturized electronic assembly.

  This paper will be a summary of a significant amount of experimental data and process optimization techniques that were employed to establish precision SMT printing process. Our results indicate that the industry standard stencil aperture aspect ratio requirement of > 0.66 is an excellent rule of thumb. However, by optimizing printer setup with vacuum support, foil-less clamps, squeegee edge guards etc and assuring cleanliness and squeegee and stencil quality, we have been able to obtain acceptable stencil printing results with area ratios of 0.5 with Type III solder pastes. The work that was performed to achieve these results will be discussed in detail in the paper.

• Lead-free: Controlling Tombstoning Behavior

  By Benlih Huang and Ning-Cheng Lee [View Bio]

  Tombstoning has plagued the surface mount assembly industry for decades. While the problem seemed under control, it has begun creeping in again due to the miniaturization of discretes such as 0402S and 0201S. This article studies tombstoning behavior on a series of SN AG CU Lead-Free Solders and attempts to find a way to control the problem.

• Photovoltaic Module Assembly Using SMT Assembly Materials and Processes

  By Karl Pfluke

  EMS providers specializing in SMT are seeking to diversify and fill capacity. Photovoltaic module assembly is a popular choice. PV cell stringing in solar module assembly is achieved using many common SMT materials and processes. Solders, fluxes, and reflow technologies produce electrical interconnects in a-Si and c-Si photovoltaic assembly technology.

• Solder Paste Evaluation Techniques for Pb-Free

  By Timothy Jensen [View Bio]

  As the July 1, 2006 Pb-free deadline approaches, many electronics assemblers are beginning to fathom the changes and process demands required. The two biggest material concerns involve solder paste and components. This document provides practical recommendations for evaluating Pb-free solder pastes and ensuring that the selected solder paste will deliver assembly yields comparable to, or better than, the incumbent Sn/Pb solder paste.

• Chinese Version of Solder Paste Evaluation Techniques for Pb-Free

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