Technical Papers

• Die Attach in Lead Frame Packages - A Tutorial

  By Frank Komitsy Jr. and Ronald Lasky, Ph.D., PE

  Although much of the buzz in the industry surrounds newer high-tech packages such as ball grid array (BGA), chip scale packages (CSP) and flip chips,the foundation of modern electronics is the lead frame package. The major lead frame package's small outline ICs (SOICs) and plastic quad flat packs (PQFPs) make up the bulk of all surface mount IC packages manufactured in the world (Figure 1). With 70 billion produced in 2004, they represent about 70 percent of all surface mount packages. Every man, woman and child on Earth could be given 11 of these packages yearly.

• Through-Hole Assembly Options for Mixed Technology Boards

  Ross B. Berntson, Ronald Lasky, Ph.D., PE, Karl P. Pfluke

  Surface mount assembly has dominated its through-hole predecessor since the early 1990s. The higher density and lower ultimate cost of SMT makes it a preferred assembly technology. However, the mechanical strength of through-hole connections continues to make through-hole the technology of choice in assembling connectors.

  This presentation will describe the primary methods currently used for through-hole connector assembly:

  1. selective wave solder
  2. pin-in-paste (PIP) i reflow
  3. hand soldering
  4. solder preforms

  We will show how solder preforms are an excellent alternative when PIP provides insufficient solder.

  The wave solder method requires specialized equipment and processes to solder connectors. Pin-inpaste reflow evolved as a way to accomplish through-hole assembly without additional equipment or process steps. In the PIP method, the additional solder required to fill the though-hole barrel is deposited by overprinting the pad in the area of each connector pin, using standard SMT equipment. During reflow, the solder wicks to each pin forming the solder fillet.
  
  This paper explains why pin-through-paste reflow methods based on overprinting solder paste have become more challenging due to an increasing use of Organic Solderability Preservative (OSP), finefeature devices (e.g. fine pitch connectors) and densely populated PCB layout designs that conflict with requirements for successful use of step-stencils. This paper also shows an example where solder preforms were used to provide extra solder volume for each pin. This work demonstrates how solder preforms provide a viable manufacturing solution to ensure complete through-hole solder joints.

• 5 Solder Families And How They Work

  Eric Bastow

  Low melting-temperature alloys are vital to successful electronics assembly.

  Solder is a critical material that physically holds electronic assemblies together while allowing the various components to expand and contract, to dissipate heat, and to transmit electrical signals. Without solder, it would be impossible to produce the countless electronic devices that define the 21st century.

  Solder is available in numerous shapes and alloys. Each has its particular properties, providing a solder for nearly every application.Many times, solder is an afterthought in the design and engineering process. However, by considering the soldering step early in the design process, problems can be minimized. In fact, with the proper information, the characteristics of a solder can be part of an optimal design.

• Prospect of Lead Free Alternatives for Reflow Soldering

  Dr. Benlih Huang, Dr. Ning-Cheng Lee 1999

  The prospects of 10 major lead-free solder alloys for being widely used for reflow soldering are studied in this work. Compatibility of those alloys with a variety of representative flux chemistries is considered essential, and is determined for performance in handling-ability, including shelf life and tack time, and soldering capability, including solder balling, wetting, and solder joint appearance. Results indicate that the control 63Sn37Pb is still the most compatible alloy, rated 27.1 in compatibility out of a full scale 30 when using warm profile. The primary factor which distinguishes 63Sn37Pb from the rest alloys is the soldering performance, particularly the wetting and solder appearance. As to the solder balling, although 63Sn37Pb is also the best, it is fairly close to the best lead-free systems. Among the lead-free options, both SnAgBi alloys studied here, 91.7Sn3.5Ag4.8Bi and 90.5Sn7.5Bi2Ag, turn out to be on the top of lead-free systems, rated 22.9 and 22.8, respectively. This is mainly attributed to the better wetting and solder balling performance. Shelf life and tack time of the SnAgBi systems are also fairly good, while the solder appearance is at best considered average. The six alloys, 99.3Sn0.7Cu, 95.5Sn3.8Ag0.7Cu, 93.6Sn4.7Ag1.7Cu, 96.2Sn2.5Ag0.8Cu0.5Sb, 58Bi42Sn, and 95Sn5Sb, show fairly comparable performance to each other, with compatibility ranging from 19.3 to 20.3. In general, the whole group displays a quite noticeably poorer wetting than SnAgBi systems. 58Bi42Sn exhibits a fairly poor solder balling performance, but an outstanding solder appearance among lead-free systems. 96.2Sn2.5Ag0.8Cu0.5Sb shows a relatively poor performance in both wetting and solder appearance among these six alloys. 96.5Sn3.5Ag, rated 17.1 in compatibility, is ranked below the other alloys described above, mainly due to poor performance in solder balling, and particularly the poor wetting. 89Sn8Zn3Bi, rated only 2.2 in compatibility, falls far short in every category when compared with all other alloy systems. Obviously, this is attributable to the very reactive nature of zinc, which results in excessive oxidation of metal and excessive reaction with fluxes, and consequently a definitely unacceptable performance for solder paste applications. High-tin-content lead-free alloys seem to display a thicker IMC layer than eutectic SnPb when reflowed.

• Lead-Free Soldering - Where The World Is Going

  Dr. Ning-Cheng Lee 1999

  Lead-free soldering for electronic industry is a segment of global trend toward lead-free environment. Although initiated in U.S. in early 1990's, it advanced much more rapidly in Japan and Europe. This differentiation in Pb-free progress triggered great concerns of users of Pb-containing solders about maintaining business opportunity, therefore further expedites the advancement of Pb-free soldering programs. The favored Pb-free solder alternatives vary from region to region. However, in general, high tin alloys are preferred, including Sn/Ag, Sn/Cu, Sn/Ag/Cu, Sn/Ag/Bi, and various versions of those alloys with small amount of additions of other elements, such as Sb. Sn/Ag/Bi systems are used in some Japanese products already. However, Sn/Ag/Cu systems are more tolerant toward Pb contamination than Bi-containing systems, therefore are more compatible with existing infrastructure for the transition stage. Pb-free surface finishes for PCBs include OSP, immersion Ag, immersion Au/electroless Ni, HASL Sn/Cu, Sn/Bi, electroless Pd/electroless Ni, electroless Pd/Cu, and Sn. The challenge for components is greater than for solder materials or PCBs. Although some Pb-free surface finishes for components exist, such as Sn, Pd/Ni, Au, Ag, Ni/Pd, Ni/Au, Ag/Pt, Ag/Pd, Pt/Pd/Ag, Ni/Au/Cu, Pd, and Ni, the performance remains to be verified. In addition, options for higher melting temperature solder is still not available for high temperature applications, including first level interconnect within the components. Thermal damage can be a concern for both PCBs and components.

• The No-Clean Soldering Process

  Dr. Ning-Cheng Lee

  No-clean soldering is the lowest-cost available process alternative in the post-CFC era. In order to enjoy the benefits of the no-clean process, care should be taken to assure the cleanliness of components and circuit boards before and after assembly. In addition, no-clean soldering materials have to be properly formulated in order to deliver the high reliability and suitable flux residue appearance required. Due to the elimination of cleaning in this process, issues such as solder beading, solder balling, probe testability, wire bondability, compatibility with polymeric coatings or wave soldering fluxes have to be addressed. No-clean fluxes typically utilize hydrophobic chemicals and often are similar to RMA flux chemistries. A nitrogen reflow atmosphere is required if a low residue level is required. Some conventional testing methods may not be suitable for evaluating no-clean soldering materials. Concurrent trends of shifting toward finer pitch, higher reliability, lower residue, and air reflow processes pose a great challenge for any no-clean soldering process.

• Optimizing Reflow Profile Via Defect Mechanisms Analysis

  IPC Printed Circuits Expo ’98

  The reflow profile is engineered to optimize the soldering performance based on defect mechanisms analysis. In general, a slow ramp-up rate is desired in order to minimize hot slump, bridging, tombstoning, skewing, wicking, opens, solder beading, solder balling, and components cracking. A minimized soaking zone reduces voiding, poor wetting, solder balling, and opens. Use of low peak temperature lessens charring, delamination, intermetallics, leaching, dewetting, and voiding. A rapid cooling rate helps reducing intermetallics, charring, leaching, dewetting, and grain size. However, a slow cooling rate reduces solder or pad detachment. The optimized profile favors that the temperature ramps up slowly until reaching about 175°C. The temperature is then gradually raised further up to 180°C within about 20-30 seconds, then raised rapidly until reaching about 220°C. After that, the temperature is brought down with a rapid cooling rate. The conventional profile was developed due to the limitation of past reflow technologies. Implementation of the optimized profile requires the support of a heating-efficient reflow technology with a controllable heating rate. Vapor phase reflow can provide a rapid heating, but has difficulty to control the heating rate. Infrared reflow can regulate the heating rate, but is sensitive to variation in parts features. Emergence of the forced air convection reflow provides controllable heating rate. In addition, it is not sensitive to variation in parts features, thus allows the realization of the optimized profile.

• Solder Ball Manufacturing and Attachment for BGA

  Panel Discussion Presentation in BGA Symposium, Nepcon West 1997

  Spheres are manufactured via sequential flow/quench or reflow processes, then followed by degreasing and classification. Surface contamination or mishandling can aggravate sphere solderability. Sphere attachment onto BGA typically is achieved via vacuum-transfer or gravity-dispensing processes, and the spheres are held in place by flux or solder paste before reflow. Welding process also in use. Bumping can be achieved via confined solder paste during reflow. Bumping with Sn62/Sn63 spheres & paste yields excellent results. Bumping with Sn62/Sn63 spheres & flux desires high viscosity, high volatility, large pitch, low print thickness, low flux activity, & small pads. Bumping with Sn10 sphere & paste exhibits no missing, and the yield increases with decreasing print thickness, decreasing volatility, increasing sphere solderability, increasing flux activity, increasing pad size, increasing metal load, & increasing pad solderability. The yield is not affected by viscosity, pitch, and reflow profile. For bumping with paste alone approach, easily releasable paste is crucial for regular print-release-reflow process. Bumping with integrated preform is promising. Reducing the thickness & width of solder links is essential for better yield.

• Voiding in BGA at Solder Bumping Stage

  ISHM 1997

  Voiding in BGA at Sn63 solder bumping stage typically occurs at the interface of eutectic solder and the BGA pad, due to the tendency of forming minimal molten solder surface area at bubble surface area at bubble surface. At low voiding level, Pb90 bump systems exhibit more voiding than eutectic Sn-Pb bump systems. primarily due to the sandwich effect which entraps fume bubbles for Pb90 systems. However, at high voiding level, Pb90 bump systems exhibits less voiding than eutectic Sn-Pb bump systems, due to the radius of curvature effect which compresses the bubble size of Pb90 bump systems. In general, the voiding in BGA at solder bumping stage increases with decreasing flux activity, decreasing flux or paste deposition thickness, increasing oxide level of spheres or pads, increasing pad dimension, increasing reflow profile length, and increasing metal content. The sphere oxide effect is more pronounced for Pb90 bump systems than for eutectic Sn-Pb bump systems, due to the immobilized oxide for the former systems as well as the sandwich effect. Voiding also increases with decreasing flux/paste viscosity, presumably due to a decrease in the flux capacity. No correlation can be identified between voiding and flux volatility. The mechanisms of voiding unveiled suggest that the preferential location of voids at interface is inevitable, and use of high melting point sphere for solder bumping helps confining the void size. Surface tension is the most crucial property dictating voiding. It influences the voiding phenomena via tendency of forming minimal liquid surface area at bubble surface and radius of curvature effect.

• Probe Testability of No-Clean Solder Pastes

  Nepcon West 1997

  The probe-testability of no-clean solder paste flux residue at in-circuit-test is determined mainly by the residue amount, residue location, and residue hardness. The testability increases with decreasing amount of residue, decreasing amount of top-side flux spread, and increasing amount of bottom-side flux spread. The residue amount, top-side flux spread, and bottom-side flux spread affect primarily pad probing, pad probing, and pin-tip probing, respectively. Inert reflow atmosphere helps probe penetration. Higher metal load effectively reduces the flux spreading. Among all, the soft residue approach appears to be most promising in providing successful probe contact.

• Reflow Soldering: Meeting the SMT Challenge

  Nepcon West 1997

  Reflow soldering of solder paste is the primary board-level interconnection method used in SMT assembly process. The major issues which plague the reflow soldering performance include, but not limited to, bottom-side-component-holding, bridging, dewetting , low-residue, opening, solder balling, solder beading, solder-fillet-lifting, tombstoning, and voiding. The mechanisms, causes, and cures for each issue are briefly discussed in this article.

• Options and Concerns of BGA Solder Bumping

  Micro Mat, Berlin, Germany 1997 - “Keynote Lecture”

  The solder bumping process for BGA is investigated by using solder paste alone, solder spheres with solder paste, and solder spheres with fluxes. Also explored is the use of integrated preform together with either flux or solder paste. For bumping process involving Sn62 or Sn63 spheres, use of paste for sphere attachment produces excellent results. In the case of using fluxes for Sn62 or Sn63 sphere attachment, the defect rate increases with decreasing flux viscosity, decreasing solvent volatility, decreasing pitch dimension, increasing flux deposition thickness, increasing flux activity, and increasing pad diameter. For systems using pastes for Sn10 sphere attachment, no missing is observed, and the alignment improves with decreasing paste deposition thickness, decreasing solvent volatility, increasing sphere solderability, increasing flux activity, increasing pad dimension, increasing metal load, increasing pad solderability. Paste viscosity, pitch, and reflow profile has negligible effect on the Sn10 bumping yield using Sn63 solder paste. An easily releasable solder paste is crucial if a regular print-release process is desired for bumping with solder paste alone. Bumping with integrated preform is promising. Reducing the thickness and width of the solder link is considered essential for improving the bumping success rate. Other potential bumping processes may include (1) dispense paste/reflow, (2) print paste/reflow/release, (3) apply solder mask/print paste/release /reflow/strip solder mask, (4) solder jet/reflow, and (5) sphere welding, and are briefly introduced and commented on.

• Engineering Solder Paste Performance Via Controlled Stress Rheology Analysis

  SMI 1996

  Rheology of a solder paste has a significant effect on its stencil printing, tack, and slump performance. This paper describes a series of tests designed to investigate the rheological properties of a suite of solder pastes and fluxes, and the correlation with the solder paste performance prior to reflow. Data indicate that:

  1. print defect is proportional to the compliance (J1 and J2) and inversely proportional to the elastic properties (G'/G"recovery) and meta-rigidity (Yield Stress)
  2. slump resistance is proportional to elastic properties (Recovery), solid characteristics (Stress [G'=G"]), and rigidity ( | G* I )
  3. high elastic properties (Recovery), low compliance (Jl and J2), and low solid characteristics (Stress [G'=G"]) are required in order to achieve high tack value

  Good correlation between fluxes and solder pastes are observed for Yield Stress and Recovery only, suggesting those two properties are primarily dictated by fluxes.

• Interconnections for SMT, BGA, and Flip Chip Technologies

  Nepcon Penang 1996 - “Keynote Lecture”

  In this article, the interconnect infrastructure for SMT, BGA, and flip chip are reviewed, with particular emphasis on the bonding technology. Interconnection technologies are the vital part of electronic packaging. Obviously, interconnections of SMT industry, from components to boards to board-level assembly methods, are the most mature and well established technology. BGA, on the other hand, intelligently utilizes the knowledge of SMT interconnections and re-engineers the design through combining the strength of various interconnect technologies and successfully comes up with a great family of versatile packages. Flip chip interconnects, while also trying to incorporate existing technology, place a good deal of emphasis on the polymeric systems, and very much develop a new arena of interconnect concepts and processes. The impact of flip chip interconnect progress is expected to ripple through the rest of electronic industries in the near future.

• Voiding Mechanism in BGA Assembly

  ISHM 1995 - “Best Paper in Session for SMT-BGA”

  Voiding in BGA assembly using Sn63 solder bumps is primarily introduced at board-level assembly stage. On the pretinned PCBs, voiding of BGA joints increases with increasing solvent volatility, increasing metal content, and increasing reflow temperature, and with decreasing powder size. This can be explained by a viscosity dictated flux-exclusion-rate model. In this model, a higher viscosity in fluxing medium at reflow temperature could hinder the exclusion of flux from the interior of molten solder, hence increase the chance of outgassing due to the increasing amount of entrapped flux, and consequently result in a higher voiding in BGA assembly. Flux activity and reflow atmosphere appear to have negligible effect on voiding when the solderability of the immobile metallization is not a concern. Increase in void content is accompanied by an increase in fraction of large voids. This suggests that, similar to voiding phenomena in SMT process, factors causing voiding in BGA will have an even greater impact on the joint reliability than what shown by the total-void-volume analysis results.

• A Drop-In Lead-Free Solder Replacement

  SMI 1994

  Environmental and toxicity concerns related to the use of lead have initiated the search for acceptable, alternate joining materials for electronics assembly. This paper describes a novel lead-free solder designed as a ”drop in“ replacement for common tin/lead eutectic solder. The physical and mechanical properties of this solder are discussed in detail with comparison to tin/lead eutectic solder. The performance of this solder when used for electronics assembly is discussed and compared to other common solders. Fatigue testing results are reported for thermal cycling electronics assemblies soldered with this lead-free composition. The paper concludes with a discussion on indium metal availability, supply and price.

• Voiding Mechanisms in SMT

  China Lake’s 17th Annual Electronics Manufacturing Seminar, 1993

  The mechanisms for void formation are investigated for applications involving solder paste in SMT. Generally the voids are caused by the outgassing of entrapped flux in the sandwiched solder during reflow. The voiding is mainly dictated by the solderability of metallization, and increases with decreasing solderability of metallization, decreasing flux activity, increasing metal load of powder, and increasing coverage area under the lead of the joint. Decrease in the solder powder particle size shows only a slightly negative effect toward voiding. The data indicate that voiding is also a function of the timing between the coalescing of solder powder and the elimination of immobile metallization oxide. The sooner the paste coalescing occurs, the worse the voiding will be. Increase in voiding usually is accompanied by an increasing fraction of large voids, suggesting factors causing voiding will have an even greater impact on the joint reliability than what shown by the total-void-volume analysis results. Preliminary data show that certain pre-dry treatment and flux solvent with higher boiling point appear to cause increased voiding.

• Prospects of Solder Paste in Ultra Fine Pitch Era

  SMI 1993 - “Best Paper in Conference Proceedings”

  The 12 mil pitch processing is achievable with solder paste. It may also be the limit of solder paste printing technology, mainly due to the scooping problem associated with thin stencils. With decreasing pitch size, both smear and insufficiency rate increase. Tapering of stencil aperture helps thick stencil prints, but hurts on thin stencil printing. Overall, use of fine powders is the most effective means to meet most challenges. It helps on achieving high performance in printability, tack, and non-slump, with acceptable trade-off in rheology and tack time. Solder balling may be the primary hurdle. The problem may be resolved by using inert reflow atmosphere or via flux chemistry improvements. A metal load of 90.5 to 91% seems to be the optimum for most properties.

• Electromigration vs SIR

  ISHM 1993 - “Best Paper of Session for Failure Analysis & TQM”

  The IPC-SF-818 Surface Insulation Resistance (SIR) test data taken with the use of a variety of halide-free no clean fluxes are analyzed against Bellcore TR-NWT-000078 Electromigration (EM) test data. Neither test results show correlation with bulk flux resistivity, flux water extract resistivity, flux residue moisture pickup, and flux corrosivity without bias. However, in the case of rosin fluxes, the insulation resistance behavior in both SIR and EM tests is a function of pH value of fluxes. This phenomenon is more profound in SIR test. In the case of low residue no clean fluxes, only SIR test displays such a pH dependent relationship. Data suggest that the 50 volts bias voltage used in SIR test may be responsible for this, and can be explained with a high-bias-voltage-induced electrolysis mechanism which is further promoted by a high pH environment. This failure mechanism is absent in EM test which utilizes 10 volts bias voltage, and probably will not occur at normal 5 volts application condition. Over all, the SIR test seems to be more stringent while the EM test appears to be more realistic.

• A Model Study of Low Residue No-Clean Solder Paste

  Nepcon West 1992

  As one of the major approaches to address the CFC issue, no-clean solder paste has received rapidly increasing attention. Although currently the industry seems to accept full residue paste as a temporary solution, the low residue no-clean paste technology using inert or reactive atmosphere advances immensely to meet the challenge. Presently consensus has hot been established yet regarding how low a residue level could be achieved and how inert the atmospheres needs to be. In this study, a semi-empirical model is proposed to predict the soldering performance of low residue solder pastes under various levels of inert reflow atmosphere. The model predicts that the soldering performance would improve rapidly then gradually level off with decreasing oxygen content. The soldering performance vs oxygen content curves are superimposable, with the lower residue one leveling off at lower oxygen level. In general, the experimental data match this model fairly well. However, the data also indicate that, although inert atmosphere improves soldering performance, the optimum condition for bond strength performance seems to demand the presence of some oxygen. This unexpected behavior suggests that a very tight low oxygen level control may not be required. The mechanism responsible for this phenomenon can be attributed to oxidation-induced resin cross-linking. This slows down the flux drying rate as well as hinders the permeation of oxygen through the flux layer.

• Solder Beading in SMT - Cause and Cure

  Surface Mount International 1991 - “One of the Best 5 Papers Presented”

  Solder beading is a special phenomenon of solder balling when using solder paste in certain SMT applications. In brief, solder beads are large solder balls near components with very low stand-off. In this study, the data indicate solder beading was caused by flux outgassing which overrode the paste cohesive force during the preheat stage. The outgassing promoted the formation of isolated paste aggregates underneath the low clearance components. At reflow, the isolated paste melted and , once emerged from the underside of the components, coalesced into solder beads. Processing wise, this problem can be remedied by slowing down outgassing via a milder preheat profile, or by reducing print thickness. Materialize wise, solder beading can be corrected by enhancing the paste cohesive force via cold welding of solder powders during the preheat stage. This in-turn can be accomplished through the use of lower activation temperature flux, coarser solder powder, higher metal load, and solder powders with lower oxide content. Other parameters which could affect the performance will also be discussed.

• Solder Paste: Meeting The SMT Challenge

  SITE Magazine 1987

  This paper focuses on many of the problems facing process engineers today. The experiments used in this study were designed to find the true causes of the problems and headaches which plague SMT assembly today. Data indicate that wicking is caused by a relative hotter component and is aggravated by non-co-planarity. It can be reduced by slower heating rate or more bottom-side heating. Bridging is caused by slumping, and is aggravated by smaller pitch dimension and slower flux wetting speed. Tombstoning is a result of uneven heating. It can be reduced by optimizing pads spacing and by using fluxes with slower wetting speed, or by a smaller print thickness. Problems such as slumping, clogging, solder balls, and white residue are also discussed.

• Achieving Ultra-Fine Dot Solder Paste Dispensing

  Advanced Electronics Assembly - Providence, 1998

  In order to achieve ultra-fine dot solder paste dispensing, both solder material and dispensing equipment have to be optimized. Dispensability of solder paste was evaluated in terms of “dispensing rate,” consistency of dispensing rate, and the stability of dispensing rate with time. Within the given conditions, threshold values for dispensability seem to exist for viscosity, powder size, and metal content. Small nozzle inner diameter is definitely needed to deliver a small dot size.

  Archimedes Metering Valve shows a greater flexibility in metering the volume than Positive Displacement Pump, primarily due to a greater sensitivity in dispensing volume to variation in pressure, and nozzle ID, besides being very sensitive to variation in encoder count. For success in high speed ultra-fine dot dispensing process, solder pastes with a low viscosity, small powder size, low metal content, and a high thixotropy are desired to deliver a high dispensing throughput. Controlwise, a high pressure and high encoder count may be promising. The consistency improves with increasing metal content, thixotropy, pressure, nozzle size,  and encoder count. Viscosity, powder size, and delay time appear to have negligible effect on consistency. The stability increases with increasing flux activation temperature, and is expected to be poor for low thixotropy and low viscosity. Large powder size may cause immediate clogging, while small powder size may cold weld under repeated pressure cycling using pneumatic pump systems. In general, a very careful design and tight control of parameters discussed in this work has to be implemented in order to succeed in ultra-fine dot solder paste dispensing.

• Soldering Technology for Area Array Packages

  SMTA International 1999 - San Jose, CA

  Soldering is the primary interconnection technology for area array packages. Methods for solder bumping for area array packages can be categorized as follows: (1) build-up process, (2) liquid solder transfer, (3) solid solder transfer, and (4) solder paste bumping. The first group includes both evaporation and electroplating processes, while the second group includes meniscus bumping and solder jetting. The third group includes wire bumping, sphere welding, decal solder transfer, tacky dot solder transfer, integrated preform, and pick-and-place solder transfer processes, with the last one (pick & place solder transfer) being the current prevailing option.  Solder paste bumping exhibits great potential to reduce bumping costs dramatically, and includes the print-detach-reflow, print-reflow-detach, and dispense approaches.  For an area array package attachment process, depending on the type of packaging, either flux, fluxless soldering or solder paste printing may be used as the attachment medium. Although area array packaging generally offers a robust process, attention should be paid to reduce defects such as  delamination, misalignment, elongated joint, voiding, bridging, opens, cracking, poor wetting and various attachment interactions.

• Lead-Free Soldering and Low Alpha Solders for Wafer Level Interconnects

  SMTA International, 2000 - Chicago

  Lead-free soldering, originally started as an environmental issue, is evolving rapidly into a business survival tool for the worldwide electronic industry. Promising lead-free solder alternatives for surface mount assembly applications include eutectic Sn/Ag, eutectic Sn/Cu, Sn95/Sb5, eutectic Sn/Bi, Sn/Ag/Cu, Sn/Ag/Cu/X, Sn/Bi/Ag/X, Sn/Zn/X, and Sn/In/Ag/(X). However, for wafer level area array solder bump interconnects, most of those options fall short in terms of fatigue resistance. Sn/In/Ag/(X) appears to be superior when compared with Sn63/Pb37, as demonstrated by Sn/In/Ag/Cu. For applications involving high lead solders, no solder alternatives have been developed yet. While the industry is advancing toward being finer, smaller, lighter, and faster, wafer level packages using area array solder interconnects is suffering from the soft error due to alpha emission from the lead in the solders. Although lead-free solder alternatives for eutectic Sn/Pb are virtually free from alpha emission, the continuous dependence on the use of high-lead solders for C4 applications indicates that the challenge of alpha emission from lead-containing solders will persist regardless of the lead-free move of the industry. This challenge is getting tougher with the rapid advancement of IC design toward further miniaturization. Low alpha lead can be obtained from cold lead ore, old lead, and laser isotope separation process, with the latter having potential as a long term solution. The price of those low alpha lead is very expensive when compared with the regular lead. Due to the increase in I/O density, requirement on alpha emission level may soon move from LC2 to LC3 level. The supply of low alpha lead for wafer level interconnects does not seem to be an issue.

• Solder Bumping Via Paste Reflow For Area Array Packages

  Etronics, March, 2001

  Several unique solder paste systems have been developed and tested for 63Sn/37Pb solder bumping for wafer, CSP, and BGA with the low cost print-detach-reflow process. The results indicate that the bump height achieved is very adequate and consistent for all three area array package systems. The yield is also very high for both before reflow and after reflow condition. With the unique high slump resistance exhibited by those newly developed pastes, the paste transfer efficiency at printing stage becomes the most critical performance for this process. The transfer efficiency increases with increasing area ratio, decreasing pitch, decreasing stencil thickness, decreasing challenge, and is not sensitive to aspect ratio of aperture to solder particle size. The paste systems appear to have more potential for depositing a larger amount of paste per unit pitch, as evidenced by the linear relation between expected paste volume and the deposited paste volume. Increasing metal content may be the most effective approach. The flux residue of those pastes is cleanable with solvents. Microstructure of solder bumps appears normal. Successful implementation of this paste bumping process also relies on stencil manufacturing technology capable of providing an aperture pattern with spacing considerably smaller than the stencil thickness. Slow print speed is also essential for adequate printing. A non-shiny non-smooth stencil surface is considered beneficial for aiding paste rolling.

Technical Paper Abstract Request Form 

After you have checked the box corresponding to each technical paper abstract you would like to receive, fill out and submit the following form.

Fields in bold are required to process your request.