One of the things that bring customers over to our semiconductor tradeshow booths, year after year, is the pictorial roadmap. This is the diagram you will see prominently displayed, at each show, that demonstrates the process flows for different devices, and how and where Indium Corporation semiconductor assembly materials are used in the process. It's also one of the most photographed things at any semiconductor show as customers, competitors, and others like to use it as a point of reference when discussing their own processes.
The current diagram is about 5 years old, and, in the fast-changing world of semiconductor assembly and packaging, is starting to show its age (although I was surprised to see how many people at Semicon China were still photographing it.)
We are proud to work with Utica,NY-based Paige Group and I spent several hours last week at their offices working with graphic artist, Susan Evans, on the next version of the pictorial roadmap. The interim process is shown at the right: from the scribbled start on the left, to the reworked old diagram in the middle, to the prototype of the new roadmap on the right.
The world of 2.5D and 3D assembly processes is now a major part of this roadmap, which, this time, focuses on standard semiconductor devices. Note that we will have an expanded pictorial roadmap for the power semiconductor industry and its various verticals - out later this year.
In trying to produce a simplified version of a complex process, there is always a need to take shortcuts, and the pictorial roadmap is no exception. For example, we know that sometimes zero level interconnect (ZLI), [microbump/copper pillar flip chip to interposer], is done after the first level interconnect (FLI) [interposer to substrate] rather than beforehand, and we understand the reasons why, too! So please forgive us a little artistic license and, as always, we look forward to your comments when the final roadmap goes "live" both on our website, and at our booth (6365, North Hall) at Semicon West 2012.