Indium Blog

Indium Wafer Bumping Optimization

  • Indium
  • Indium Corporation

  • A more experienced engineer than myself offered a bit of advice for wafer bump plating with indium:






    “Electroplating using the indium sulfamate plating bath is one method of depositing indium bumps onto wafers.  However, using direct current often results in deposits with a high degree of surface irregularity that can result in electrical shorts between individual bumps.  One solution to the problem is to use microprocessor controlled pulse plating where the current polarity periodically changes, resulting in the plating and de-plating of indium.  Obviously, the positive portion of the cycle where indium is deposited, has to be greater than the negative portion of the cycle where indium is de-plated, to have a net deposit gain.







    Pulse plating works because the negative portion of the cycle removes excess indium in high current areas that plate faster than low current areas, resulting in a leveling or smoothing of the deposit.   There are three variables in pulse plating:






    Wave shape - sine, sawtooth or square



    Ratio of the amperage of the positive to negative cycle



    Time on in both the positive and negative cycle 






    Determining these variables must be done empirically, and most companies that have successfully done so, consider the information proprietary.”  We can suggest (offline) specific values as an initial starting point to establishing optimum settings for pulse plating of indium for a wafer bumping process.






    Authored by previous Indium Application Manager Jim Hisert