The flip-chip process involves taking the singulated die from a wafer mounted on a wafer dicing tape, inverting ("flipping") them and placing them onto a substrate. The substrate may be a printed circuit board, a ceramic substrate, or (in the case of 2.5D and 3D assembly) an interposer.
Copper pillar/solder microbumps are emerging as a standard flip-chip solder bump replacement in many parts of the semiconductor assembly industry, from standard chip-attach to power devices using flip-chip on leadframe as assembly technologies. For logic and similar devices, substrate metallization (landing pad) technology has also shifted from solder-on-pad (SoP), manufactured from printed and reflowed and cleaned solder paste, to individual solder balls. The technology is now moving to simple organic solderability protectant (OSP) on copper.
Water-soluble fluxes, which may be applied by dipping or spraying, have long been used in flip-chip assembly, but their long history of utility is coming to a close as a number of factors makes the move to no-clean inevitable in the high-volume sub-130micron copper pillar era.
The use of copper pillar instead of solder bumps has meant that chip-substrate clearances and finer pitches do not necessarily move in lock-step with each other. However, copper pillar heights of 40-60 microns (and even shorter than this in the near future) combined with fine pitch, makes cleaning extremely complex. Aqueous (water-based) cleaning becomes more complex with fine pitch flip-chip attach as it becomes increasingly difficult to get the cleaning solution under the chip to dissolve the residues, and then to carry the residue-containing solution out from under the chip.
A recent emerging failure mode caused by cleaning involves solder joint damage during aqueous jet impingement. This failure mode is believed to be driven by a combination of: very small diameter microbumps; the move from hemispherical to very thin solder microbumps on copper pillar (reduced joint compliance); and low CTE, low-cost, and low layer count (thinned) substrates. In these circumstances, a move towards an ultra-low residue no-clean flux is inevitable, although new failure modes continue to appear, being driven by the smaller dimensions. For this reason, Indium Corporation has introduced a new ultra-low (ULR) flux called NC-26-A for both current and emerging applications.
Flip-Chip Flux Technical Documents
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Flux Blog Posts
Part 3 of the semiconductor flux series talks about the important cleaning function of fluxes and how thermocompression bonding can help prevent warpage and die tilt.
This is the second in a series of posts about semiconductor fluxes, and talks about the optimal dipping depth for flip-chip fluxes.
If you are a little intimidated by semiconductor products, this blog post provides a simple explanation to help you better understand these products.
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