CLINTON, N.Y., October 23, 2026 — Five tech experts from Indium Corporation, a leading developer of AI-enabling and high-reliability soldering materials, will share new technical insights at SMTA International 2026, October 25–29, in Rosemont, Illinois. The team’s presentations will focus on several critical industry topics, including thermal interface materials (TIMs), defect mitigation, and lead-free assembly protocols.
October 27, 10:30 a.m.-12:00 p.m. CDT – Back to Basics: Mastering the First Step – Stencil Printing, presented by Adam Murling, Technical Services Manager, U.S.A.
This back-to-basics training session will explore the fundamentals of solder paste selection and stencil printing, with a focus on the factors that directly influence print quality, consistency, and defect performance. Attendees will learn how solder paste rheology and powder size connect to stencil design and aperture release, how area ratio and the five-ball rule can guide material selection, and how printer setup and key process parameters influence solder paste deposits.
October 27, 3:30-4:00 p.m. CDT – Mitigating Solder Joint Defects Caused by the Warpage of BGA Assembly with Lower Temperature Soldering Phase III: Selection of Ball Alloys and Temperature Cycling Test Reliability, presented by Hongwen Zhang, Director of Research & Development.
With previous studies validating lower-temperature soldering as an effective approach to reducing warpage-related defects in large BGA assemblies, this presentation investigates how alternative solder ball alloys can further reduce the required reflow temperature and mitigate dynamic warpage. The session will evaluate the effects of SAC305, SAC-Bi, SAC-3Bi, and SAC-In BGA ball alloys on bump strength, melting behavior, and temperature-cycling reliability in a lower-temperature soldering process and reveal its five principal conclusions.
October 27, 3:30-4:00 p.m. CDT – Are Gaps Bad for Printing?, presented by Lee Hong Kim, Area Technical Manager, Malaysia.
The session will examine how print gap and board quality affect solder paste printing in surface-mount technology assembly. Drawing on more than 50,000 solder paste inspection measurements, the study compares pad designs, clamping methods, print gaps, solder paste types, and stencil designs. The findings will demonstrate improved volume deposition with solder-mask-defined pads, foilless clamping, Type 5 solder paste, and nanocoated stencils, while challenging assumptions about print gaps and identifying key factors influencing paste transfer efficiency.
October 28, 12:00-12:30 p.m. CDT – Solder Thermal Interface Materials: The “Why” and the “How” of Implementing Solder TIMs in High-Performance Electronics, presented by Ronald C. Lasky, Senior Technologist.
This presentation introduces specialized materials designed to address solder joint integrity,
thermal management, and other vulnerabilities to enable better AI performance. Solutions presented include ultra-low residue flux materials for micro-bump wafer bumping and Chip-on-Wafer processes, mid-temperature solder pastes to eliminate Head-in-Pillow (HIP) and Non-Wet Open (NWO) defects, and advanced TIMs designed to significantly enhance the thermal efficiency of high-performance computing (HPC) chips.
October 28, 4:30-5:00 p.m. CDT – Restriction of Hazardous Substances (RoHS): Twenty Years Later, presented by Ronald C. Lasky, Senior Technologist.
The session will examine the evolution of lead-free manufacturing 20 years after the implementation of the Restriction of Hazardous Substances (RoHS) Directive. It will revisit early concerns and explore advances in lead-free alloys, reliability, materials, and processes, while addressing persistent challenges such as tin whiskers, voiding, and brittle fracture. The discussion will also consider RoHS exemptions, supply-chain constraints, sustainability initiatives, and how electrification, AI hardware, and high-power-density systems are shaping future materials and reliability demands.
October 28, 5:30-6:00 p.m. CDT – Impact of Surface Finish on Voiding in Mixed Alloy Solder Paste Systems, presented by Thuy Nguyen, Technical Support Engineer.
The presentation will examine how surface finish affects void formation in mixed-alloy solder paste systems for bottom-terminated components. Building on prior research, it evaluates organic solderability preservative (OSP), immersion tin (ImSn), immersion silver (ImAg), and electroless nickel immersion gold (ENIG), along with stencil design, reflow conditions, and solder paste chemistry. The findings will demonstrate how surface finish selection can further reduce voiding, support high-reliability solder interconnects, and reduce reliance on vacuum reflow.
To learn more about Indium Corporation’s full line of advanced packaging, TIMs, and PCB assembly solutions, visit indium.com.
About Indium Corporation
Indium Corporation® is a premier materials refiner, smelter, manufacturer, and supplier to the global electronics, semiconductor, thin-film, and thermal management markets. Products include solders and fluxes; brazes; thermal interface materials; sputtering targets; indium, gallium, germanium, and tin metals and inorganic compounds; and NanoFoil®. Founded in 1934, the company has global technical support and factories located in China, Germany, India, Malaysia, Mexico, Singapore, South Korea, the United Kingdom, and the U.S.
For more information about Indium Corporation, visit www.indium.com or email [email protected]. You can also follow our experts, From One Engineer To Another® (#FOETA), at www.linkedin.com/company/indium-corporation/.
